| Line 70... |
Line 70... |
input sync_reset, // Syncronous reset signal
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input sync_reset, // Syncronous reset signal
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input [15:0] write_bus, // Write Data Bus
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input [15:0] write_bus, // Write Data Bus
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input write_xgmctl, // Write Strobe for XGMCTL register
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input write_xgmctl, // Write Strobe for XGMCTL register
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input write_xgisp74, // Write Strobe for XGISP74 register
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input write_xgisp74, // Write Strobe for XGISP74 register
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input write_xgisp30, // Write Strobe for XGISP30 register
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input write_xgisp30, // Write Strobe for XGISP30 register
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input write_xgvbr, // Write Strobe for XGVBR register
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input [ 1:0] write_xgvbr, // Write Strobe for XGVBR register
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input write_xgif_7, // Write Strobe for Interrupt Flag Register 7
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input [ 1:0] write_xgif_7, // Write Strobe for Interrupt Flag Register 7
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input write_xgif_6, // Write Strobe for Interrupt Flag Register 6
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input [ 1:0] write_xgif_6, // Write Strobe for Interrupt Flag Register 6
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input write_xgif_5, // Write Strobe for Interrupt Flag Register 5
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input [ 1:0] write_xgif_5, // Write Strobe for Interrupt Flag Register 5
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input write_xgif_4, // Write Strobe for Interrupt Flag Register 4
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input [ 1:0] write_xgif_4, // Write Strobe for Interrupt Flag Register 4
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input write_xgif_3, // Write Strobe for Interrupt Flag Register 3
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input [ 1:0] write_xgif_3, // Write Strobe for Interrupt Flag Register 3
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input write_xgif_2, // Write Strobe for Interrupt Flag Register 2
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input [ 1:0] write_xgif_2, // Write Strobe for Interrupt Flag Register 2
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input write_xgif_1, // Write Strobe for Interrupt Flag Register 1
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input [ 1:0] write_xgif_1, // Write Strobe for Interrupt Flag Register 1
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input write_xgif_0, // Write Strobe for Interrupt Flag Register 0
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input [ 1:0] write_xgif_0, // Write Strobe for Interrupt Flag Register 0
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input write_xgswt // Write Strobe for XGSWT register
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input write_xgswt // Write Strobe for XGSWT register
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);
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);
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// registers
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// registers
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|
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// Wires
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// Wires
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wire write_any_xgif;
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wire [ 1:0] write_any_xgif;
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|
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//
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//
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// module body
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// module body
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//
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//
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|
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| Line 150... |
Line 150... |
end
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end
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else if (sync_reset)
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else if (sync_reset)
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begin
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begin
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xgvbr <= 15'b1111_1110_0000_000;
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xgvbr <= 15'b1111_1110_0000_000;
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end
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end
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else if (write_xgvbr)
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else if (|write_xgvbr && !xge)
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begin
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begin
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xgvbr[15: 1] <= xge ? 15'b0 : write_bus[15:1];
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xgvbr[15:8] <= write_xgvbr[1] ? write_bus[15:8] : xgvbr[15:8];
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xgvbr[ 7:1] <= write_xgvbr[0] ? write_bus[ 7:1] : xgvbr[ 7:1];
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end
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end
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// XGISP74 Register
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// XGISP74 Register
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always @(posedge bus_clk or negedge async_rst_b)
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always @(posedge bus_clk or negedge async_rst_b)
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if (!async_rst_b)
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if (!async_rst_b)
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| Line 174... |
Line 175... |
xgisp30 <= 16'b0;
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xgisp30 <= 16'b0;
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else if (write_xgisp30)
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else if (write_xgisp30)
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xgisp30 <= xge ? xgisp30 : write_bus;
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xgisp30 <= xge ? xgisp30 : write_bus;
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// XGIF 7-0 Registers
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// XGIF 7-0 Registers
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assign write_any_xgif = write_xgif_7 || write_xgif_6 || write_xgif_5 || write_xgif_4 ||
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assign write_any_xgif = write_xgif_7 | write_xgif_6 | write_xgif_5 | write_xgif_4 |
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write_xgif_3 || write_xgif_2 || write_xgif_1 || write_xgif_0;
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write_xgif_3 | write_xgif_2 | write_xgif_1 | write_xgif_0;
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|
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// Registers to clear the interrupt flags. Decode a specific interrupt to
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// Registers to clear the interrupt flags. Decode a specific interrupt to
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// clear by ANDing the clear_xgif_x signal with the clear_xgif_data.
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// clear by ANDing the clear_xgif_x signal with the clear_xgif_data.
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always @(posedge bus_clk or negedge async_rst_b)
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always @(posedge bus_clk or negedge async_rst_b)
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if (!async_rst_b)
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if (!async_rst_b)
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| Line 206... |
Line 207... |
clear_xgif_0 <= 1'b0;
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clear_xgif_0 <= 1'b0;
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clear_xgif_data <= 16'b0;
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clear_xgif_data <= 16'b0;
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end
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end
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else
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else
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begin
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begin
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clear_xgif_7 <= write_xgif_7 && (MAX_CHANNEL > 111);
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clear_xgif_7 <= |write_xgif_7 && (MAX_CHANNEL > 111);
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clear_xgif_6 <= write_xgif_6 && (MAX_CHANNEL > 95);
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clear_xgif_6 <= |write_xgif_6 && (MAX_CHANNEL > 95);
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clear_xgif_5 <= write_xgif_5 && (MAX_CHANNEL > 79);
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clear_xgif_5 <= |write_xgif_5 && (MAX_CHANNEL > 79);
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clear_xgif_4 <= write_xgif_4 && (MAX_CHANNEL > 63);
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clear_xgif_4 <= |write_xgif_4 && (MAX_CHANNEL > 63);
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clear_xgif_3 <= write_xgif_3 && (MAX_CHANNEL > 47);
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clear_xgif_3 <= |write_xgif_3 && (MAX_CHANNEL > 47);
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clear_xgif_2 <= write_xgif_2 && (MAX_CHANNEL > 31);
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clear_xgif_2 <= |write_xgif_2 && (MAX_CHANNEL > 31);
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clear_xgif_1 <= write_xgif_1 && (MAX_CHANNEL > 15);
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clear_xgif_1 <= |write_xgif_1 && (MAX_CHANNEL > 15);
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clear_xgif_0 <= write_xgif_0;
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clear_xgif_0 <= |write_xgif_0;
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clear_xgif_data <= write_any_xgif ? write_bus : clear_xgif_data;
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clear_xgif_data[15:8] <= write_any_xgif[1] ? write_bus[15:8] : 8'b0;
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clear_xgif_data[ 7:0] <= write_any_xgif[0] ? write_bus[ 7:0] : 8'b0;
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end
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end
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|
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// XGSWT - XGATE Software Trigger Register
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// XGSWT - XGATE Software Trigger Register
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always @(posedge bus_clk or negedge async_rst_b)
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always @(posedge bus_clk or negedge async_rst_b)
|
