| Line 66... |
Line 66... |
input wbm_ack_i, // bus cycle acknowledge input
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input wbm_ack_i, // bus cycle acknowledge input
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// XGATE IO Signals
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// XGATE IO Signals
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output [ 7:0] xgswt, // XGATE Software Trigger Register
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output [ 7:0] xgswt, // XGATE Software Trigger Register
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output write_mem_strb_l, // Strobe for writing low data byte
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output write_mem_strb_l, // Strobe for writing low data byte
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output write_mem_strb_h, // Strobe for writing high data bye
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output write_mem_strb_h, // Strobe for writing high data bye
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output xg_sw_irq, // Xgate Software interrupt
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output [MAX_CHANNEL:0] xgif, // XGATE Interrupt Flag
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output [MAX_CHANNEL:0] xgif, // XGATE Interrupt Flag
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input [MAX_CHANNEL:0] chan_req_i, // XGATE Interrupt request
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input [MAX_CHANNEL:0] chan_req_i, // XGATE Interrupt request
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input risc_clk, // Clock for RISC core
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input risc_clk, // Clock for RISC core
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input scantestmode // Chip in in scan test mode
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input scantestmode // Chip in in scan test mode
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);
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);
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| Line 130... |
Line 131... |
wire xgsweif_c; // Clear XGATE Software Error Interrupt FLag
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wire xgsweif_c; // Clear XGATE Software Error Interrupt FLag
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wire xgie; // XGATE Interrupt Enable
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wire xgie; // XGATE Interrupt Enable
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wire [ 6:0] int_req; // Encoded interrupt request
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wire [ 6:0] int_req; // Encoded interrupt request
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wire [ 6:0] xgchid; // Channel actively being processed
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wire [ 6:0] xgchid; // Channel actively being processed
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wire [15:1] xgvbr; // XGATE vector Base Address Register
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wire [15:1] xgvbr; // XGATE vector Base Address Register
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wire brk_irq_ena; // Enable BRK instruction to generate interrupt
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|
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wire [15:0] xgate_address; //
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wire [15:0] xgate_address; //
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wire [15:0] write_mem_data; //
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wire [15:0] write_mem_data; //
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wire [15:0] read_mem_data; //
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wire [15:0] read_mem_data; //
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wire mem_req_ack; //
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wire mem_req_ack; //
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|
|
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wire debug_active; // RISC state machine in Debug mode
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|
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wire [ 7:0] host_semap; // Semaphore status for host
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wire [ 7:0] host_semap; // Semaphore status for host
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// wire [15:0] write_mem_data;
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// wire [15:0] write_mem_data;
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// wire [15:0] read_mem_data;
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// wire [15:0] read_mem_data;
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// wire [15:0] perif_data;
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// wire [15:0] perif_data;
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|
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| Line 212... |
Line 216... |
xgif[127:112], // XGIF_7
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xgif[127:112], // XGIF_7
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{xgvbr[15:1], 1'b0}, // XGVBR
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{xgvbr[15:1], 1'b0}, // XGVBR
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xgisp30, // Reserved
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xgisp30, // Reserved
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xgisp74, // Reserved
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xgisp74, // Reserved
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{8'b0, 1'b0, xgchid}, // XGCHID
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{8'b0, 1'b0, xgchid}, // XGCHID
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{8'b0, xge, xgfrz, 1'b0, xgdbg, 2'b0, 1'b0, xgie} // XGMCTL
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{8'b0, xge, xgfrz, debug_active, 1'b0, 2'b0, xg_sw_irq, xgie} // XGMCTL
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}
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}
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)
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)
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);
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);
|
|
|
// ---------------------------------------------------------------------------
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// ---------------------------------------------------------------------------
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| Line 228... |
Line 232... |
.xgfrz( xgfrz ),
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.xgfrz( xgfrz ),
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.xgdbg( xgdbg ),
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.xgdbg( xgdbg ),
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.xgss( xgss ),
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.xgss( xgss ),
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.xgsweif_c( xgsweif_c ),
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.xgsweif_c( xgsweif_c ),
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.xgie( xgie ),
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.xgie( xgie ),
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.brk_irq_ena( brk_irq_ena ),
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.xgvbr( xgvbr ),
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.xgvbr( xgvbr ),
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.xgswt( xgswt ),
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.xgswt( xgswt ),
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.xgisp74( xgisp74 ),
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.xgisp74( xgisp74 ),
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.xgisp30( xgisp30 ),
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.xgisp30( xgisp30 ),
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.clear_xgif_7( clear_xgif_7 ),
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.clear_xgif_7( clear_xgif_7 ),
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| Line 286... |
Line 291... |
.xgr4( xgr4 ),
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.xgr4( xgr4 ),
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.xgr5( xgr5 ),
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.xgr5( xgr5 ),
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.xgr6( xgr6 ),
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.xgr6( xgr6 ),
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.xgr7( xgr7 ),
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.xgr7( xgr7 ),
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.xgif( xgif ),
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.xgif( xgif ),
|
|
.debug_active( debug_active ),
|
|
.xg_sw_irq( xg_sw_irq ),
|
|
|
// inputs
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// inputs
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.risc_clk( risc_clk ),
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.risc_clk( risc_clk ),
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.perif_data( wbs_dat_i ),
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.perif_data( wbs_dat_i ),
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.async_rst_b( async_rst_b ),
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.async_rst_b( async_rst_b ),
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| Line 299... |
Line 306... |
.xgfrz( xgfrz ),
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.xgfrz( xgfrz ),
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.xgdbg( xgdbg ),
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.xgdbg( xgdbg ),
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.xgss( xgss ),
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.xgss( xgss ),
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.xgvbr( xgvbr ),
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.xgvbr( xgvbr ),
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.int_req( int_req ),
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.int_req( int_req ),
|
|
.xgie( xgie ),
|
|
.brk_irq_ena( brk_irq_ena ),
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.write_xgsem( write_xgsem ),
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.write_xgsem( write_xgsem ),
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.write_xgccr( write_xgccr ),
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.write_xgccr( write_xgccr ),
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.write_xgpc( write_xgpc ),
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.write_xgpc( write_xgpc ),
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.write_xgr7( write_xgr7 ),
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.write_xgr7( write_xgr7 ),
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.write_xgr6( write_xgr6 ),
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.write_xgr6( write_xgr6 ),
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| Line 317... |
Line 326... |
.clear_xgif_4( clear_xgif_4 ),
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.clear_xgif_4( clear_xgif_4 ),
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.clear_xgif_3( clear_xgif_3 ),
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.clear_xgif_3( clear_xgif_3 ),
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.clear_xgif_2( clear_xgif_2 ),
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.clear_xgif_2( clear_xgif_2 ),
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.clear_xgif_1( clear_xgif_1 ),
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.clear_xgif_1( clear_xgif_1 ),
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.clear_xgif_0( clear_xgif_0 ),
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.clear_xgif_0( clear_xgif_0 ),
|
|
.xgsweif_c( xgsweif_c ),
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.clear_xgif_data( clear_xgif_data )
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.clear_xgif_data( clear_xgif_data )
|
);
|
);
|
|
|
xgate_irq_encode #(.MAX_CHANNEL(MAX_CHANNEL))
|
xgate_irq_encode #(.MAX_CHANNEL(MAX_CHANNEL))
|
irq_encode(
|
irq_encode(
|
