Line 66... |
Line 66... |
input [DWIDTH-1:0] wbm_dat_i, // databus input
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input [DWIDTH-1:0] wbm_dat_i, // databus input
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input wbm_ack_i, // bus cycle acknowledge input
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input wbm_ack_i, // bus cycle acknowledge input
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// XGATE IO Signals
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// XGATE IO Signals
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output [ 7:0] xgswt, // XGATE Software Trigger Register
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output [ 7:0] xgswt, // XGATE Software Trigger Register
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output xg_sw_irq, // Xgate Software interrupt
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output xg_sw_irq, // Xgate Software interrupt
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output [MAX_CHANNEL:0] xgif, // XGATE Interrupt Flag to Host
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output [MAX_CHANNEL:1] xgif, // XGATE Interrupt Flag to Host
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input [MAX_CHANNEL:0] chan_req_i, // XGATE Interrupt request
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input [MAX_CHANNEL:1] chan_req_i, // XGATE Interrupt request
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input risc_clk, // Clock for RISC core
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input risc_clk, // Clock for RISC core
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input debug_mode_i, // Force RISC core into debug mode
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input debug_mode_i, // Force RISC core into debug mode
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input secure_mode_i, // Limit host asscess to Xgate RISC registers
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input secure_mode_i, // Limit host asscess to Xgate RISC registers
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input scantestmode // Chip in in scan test mode
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input scantestmode // Chip in in scan test mode
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);
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);
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Line 128... |
Line 128... |
wire clear_xgif_3; // Strobe for decode to clear interrupt flag bank 3
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wire clear_xgif_3; // Strobe for decode to clear interrupt flag bank 3
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wire clear_xgif_2; // Strobe for decode to clear interrupt flag bank 2
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wire clear_xgif_2; // Strobe for decode to clear interrupt flag bank 2
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wire clear_xgif_1; // Strobe for decode to clear interrupt flag bank 1
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wire clear_xgif_1; // Strobe for decode to clear interrupt flag bank 1
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wire clear_xgif_0; // Strobe for decode to clear interrupt flag bank 0
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wire clear_xgif_0; // Strobe for decode to clear interrupt flag bank 0
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wire [15:0] clear_xgif_data; // Data for decode to clear interrupt flag
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wire [15:0] clear_xgif_data; // Data for decode to clear interrupt flag
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wire [MAX_CHANNEL:0] chan_bypass; // XGATE Interrupt enable or bypass
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wire [MAX_CHANNEL:1] chan_bypass; // XGATE Interrupt enable or bypass
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wire xge; // XGATE Module Enable
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wire xge; // XGATE Module Enable
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wire xgfrz; // Stop XGATE in Freeze Mode
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wire xgfrz; // Stop XGATE in Freeze Mode
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wire xgdbg_set; // Enter XGATE Debug Mode
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wire xgdbg_set; // Enter XGATE Debug Mode
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wire xgdbg_clear; // Leave XGATE Debug Mode
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wire xgdbg_clear; // Leave XGATE Debug Mode
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Line 140... |
Line 140... |
wire xgss; // XGATE Single Step
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wire xgss; // XGATE Single Step
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wire xgsweif_c; // Clear XGATE Software Error Interrupt FLag
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wire xgsweif_c; // Clear XGATE Software Error Interrupt FLag
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wire xgie; // XGATE Interrupt Enable
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wire xgie; // XGATE Interrupt Enable
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wire [ 6:0] int_req; // Encoded interrupt request
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wire [ 6:0] int_req; // Encoded interrupt request
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wire [ 6:0] xgchid; // Channel actively being processed
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wire [ 6:0] xgchid; // Channel actively being processed
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wire [127:0] xgif_status; // Status bits of interrupt output flags that have been set
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wire [127:1] xgif_status; // Status bits of interrupt output flags that have been set
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wire [127:0] irq_bypass; // IRQ status bits WISHBONE Read bus
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wire [127:1] irq_bypass; // IRQ status bits WISHBONE Read bus
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wire [15:1] xgvbr; // XGATE vector Base Address Register
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wire [15:1] xgvbr; // XGATE vector Base Address Register
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wire brk_irq_ena; // Enable BRK instruction to generate interrupt
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wire brk_irq_ena; // Enable BRK instruction to generate interrupt
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wire [15:0] xgate_address; //
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wire [15:0] xgate_address; //
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Line 228... |
Line 228... |
xgate_address, // XGPC
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xgate_address, // XGPC
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{12'h000, negative_flag, zero_flag, overflow_flag, carry_flag}, // XGCCR
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{12'h000, negative_flag, zero_flag, overflow_flag, carry_flag}, // XGCCR
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16'b0, // Reserved
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16'b0, // Reserved
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{8'h00, host_semap}, // XGSEM
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{8'h00, host_semap}, // XGSEM
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{8'h00, xgswt}, // XGSWT
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{8'h00, xgswt}, // XGSWT
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xgif_status[ 15: 0], // XGIF_0
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{xgif_status[ 15: 1], 1'b0}, // XGIF_0
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xgif_status[ 31: 16], // XGIF_1
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xgif_status[ 31: 16], // XGIF_1
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xgif_status[ 47: 32], // XGIF_2
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xgif_status[ 47: 32], // XGIF_2
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xgif_status[ 63: 48], // XGIF_3
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xgif_status[ 63: 48], // XGIF_3
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xgif_status[ 79: 64], // XGIF_4
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xgif_status[ 79: 64], // XGIF_4
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xgif_status[ 95: 80], // XGIF_5
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xgif_status[ 95: 80], // XGIF_5
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