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[/] [xgate/] [trunk/] [sim/] [verilog/] [run/] [run_iverilog] - Diff between revs 2 and 5
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| Rev 2 |
Rev 5 |
| Line 12... |
Line 12... |
-o xgate_compiled \
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-o xgate_compiled \
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-D WAVES_V \
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-D WAVES_V \
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\
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\
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$xgate/rtl/verilog/xgate_top.v \
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$xgate/rtl/verilog/xgate_top.v \
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$xgate/rtl/verilog/xgate_wbs_bus.v \
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$xgate/rtl/verilog/xgate_wbs_bus.v \
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$xgate/rtl/verilog/xgate_wbm_bus.v \
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$xgate/rtl/verilog/xgate_regs.v \
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$xgate/rtl/verilog/xgate_regs.v \
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$xgate/rtl/verilog/xgate_risc.v \
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$xgate/rtl/verilog/xgate_risc.v \
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$xgate/rtl/verilog/xgate_irq_encode.v \
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$xgate/rtl/verilog/xgate_irq_encode.v \
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\
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\
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$bench/verilog/wb_master_model.v \
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$bench/verilog/wb_master_model.v \
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