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[/] [xge_mac/] [trunk/] [rtl/] [verilog/] [sync_clk_core.v] - Diff between revs 7 and 12
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         | Rev 7 | Rev 12 | 
    
    
      
        | Line 50... | Line 50... | 
      
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        | //output        ctrl_tx_disable_padding_ccr;
 | //output        ctrl_tx_disable_padding_ccr;
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        | /*AUTOREG*/
 | /*AUTOREG*/
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        | // Beginning of automatic regs (for this module's undeclared outputs)
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        | // End of automatics
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        | /*AUTOWIRE*/
 | /*AUTOWIRE*/
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        | // Beginning of automatic wires (for undeclared instantiated-module outputs)
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        | // End of automatics
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        | //wire  [0:0]             sig_out;
 | //wire  [0:0]             sig_out;
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        | //assign {ctrl_tx_disable_padding_ccr} = sig_out;
 | //assign {ctrl_tx_disable_padding_ccr} = sig_out;
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