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[/] [xge_mac/] [trunk/] [rtl/] [verilog/] [tx_data_fifo.v] - Diff between revs 7 and 12

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Rev 7 Rev 12
Line 38... Line 38...
 
 
`include "defines.v"
`include "defines.v"
 
 
module tx_data_fifo(/*AUTOARG*/
module tx_data_fifo(/*AUTOARG*/
  // Outputs
  // Outputs
  txdfifo_wfull, txdfifo_walmost_full, txdfifo_rdata,
  txdfifo_wfull, txdfifo_walmost_full, txdfifo_rdata, txdfifo_rstatus,
  txdfifo_rstatus, txdfifo_rempty, txdfifo_ralmost_empty,
  txdfifo_rempty, txdfifo_ralmost_empty,
  // Inputs
  // Inputs
  clk_xgmii_tx, clk_156m25, reset_xgmii_tx_n, reset_156m25_n,
  clk_xgmii_tx, clk_156m25, reset_xgmii_tx_n, reset_156m25_n,
  txdfifo_wdata, txdfifo_wstatus, txdfifo_wen, txdfifo_ren
  txdfifo_wdata, txdfifo_wstatus, txdfifo_wen, txdfifo_ren
  );
  );
 
 

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