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[/] [xge_mac/] [trunk/] [rtl/] [verilog/] [tx_data_fifo.v] - Diff between revs 7 and 12
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Rev 12 |
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Line 38... |
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`include "defines.v"
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`include "defines.v"
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module tx_data_fifo(/*AUTOARG*/
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module tx_data_fifo(/*AUTOARG*/
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// Outputs
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// Outputs
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txdfifo_wfull, txdfifo_walmost_full, txdfifo_rdata,
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txdfifo_wfull, txdfifo_walmost_full, txdfifo_rdata, txdfifo_rstatus,
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txdfifo_rstatus, txdfifo_rempty, txdfifo_ralmost_empty,
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txdfifo_rempty, txdfifo_ralmost_empty,
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// Inputs
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// Inputs
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clk_xgmii_tx, clk_156m25, reset_xgmii_tx_n, reset_156m25_n,
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clk_xgmii_tx, clk_156m25, reset_xgmii_tx_n, reset_156m25_n,
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txdfifo_wdata, txdfifo_wstatus, txdfifo_wen, txdfifo_ren
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txdfifo_wdata, txdfifo_wstatus, txdfifo_wen, txdfifo_ren
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);
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);
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