| Line 32... |
Line 32... |
parameter size = size_exponent + size_mantissa + size_exception_field,
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parameter size = size_exponent + size_mantissa + size_exception_field,
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parameter size_mul_mantissa = size_mantissa + size_mantissa,
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parameter size_mul_mantissa = size_mantissa + size_mantissa,
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parameter size_mul_counter = size_counter + 1)
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parameter size_mul_counter = size_counter + 1)
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( input clk,
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( input clk,
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input rst,
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input rst,
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//input start,
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input [size - 1:0] a_number_i,
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input [size - 1:0] a_number_i,
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input [size - 1:0] b_number_i,
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input [size - 1:0] b_number_i,
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input [size - 1:0] c_number_i,
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input [size - 1:0] c_number_i,
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input sub,
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input sub,
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//output busy
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output[size - 1:0] resulting_number_o);
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output[size - 1:0] resulting_number_o);
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//reg [size_mantissa - 1 : 0] m_a_number_reg, m_a_number_next; // (1.original_mantissa) => (size_mantissa+1) because of the hidden bit
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wire [size_mantissa - 1 : 0] m_a_number, m_b_number, m_c_number;
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//reg [size_mantissa - 1 : 0] m_b_number_reg, m_b_number_next; // (1.original_mantissa) => (size_mantissa+1) because of the hidden bit
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wire [size_exponent - 1 : 0] e_a_number, e_b_number, e_c_number;
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//reg [size_mantissa - 1 : 0] m_c_number_reg, m_c_number_next; // (1.original_mantissa) => (size_mantissa+1) because of the hidden bit
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wire s_a_number, s_b_number, s_c_number;
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//reg [size_exponent - 1 : 0] e_a_number_reg, e_a_number_next;
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wire [size_exception_field - 1 : 0] sp_case_a_number, sp_case_b_number, sp_case_c_number;
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//reg [size_exponent - 1 : 0] e_b_number_reg, e_b_number_next;
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//reg [size_exponent - 1 : 0] e_c_number_reg, e_c_number_next;
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//reg s_a_number_reg, s_a_number_next;
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//reg s_b_number_reg, s_b_number_next;
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//reg s_c_number_reg, s_c_number_next;
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//reg [size_exception_field - 1 : 0] sp_case_a_number_reg, sp_case_a_number_next;
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//reg [size_exception_field - 1 : 0] sp_case_b_number_reg, sp_case_b_number_next;
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//reg [size_exception_field - 1 : 0] sp_case_c_number_reg, sp_case_c_number_next;
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wire [size_mantissa - 1 : 0] m_a_number_reg, m_b_number_reg, m_c_number_reg;
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wire [size_exponent - 1 : 0] e_a_number_reg, e_b_number_reg, e_c_number_reg;
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wire s_a_number_reg, s_b_number_reg, s_c_number_reg;
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wire [size_exception_field - 1 : 0] sp_case_a_number_reg, sp_case_b_number_reg, sp_case_c_number_reg;
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//---------------------------------------------------------------------------------------
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//---------------------------------------------------------------------------------------
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wire [size_mul_mantissa-1:0] mul_mantissa, c_mantissa;
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wire [size_mul_mantissa-1:0] mul_mantissa, c_mantissa;
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wire [size_mul_mantissa :0] acc_resulting_number;
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wire [size_mul_mantissa :0] acc_resulting_number;
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| Line 72... |
Line 57... |
wire sign_res;
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wire sign_res;
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wire eff_sub;
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wire eff_sub;
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wire ovf;
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wire ovf;
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wire comp_exp;
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wire comp_exp;
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wire [size_mul_mantissa+1:0] normalized_mantissa;
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wire [size_mul_mantissa+1:0] normalized_mantissa;
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wire [size_mantissa - 1 : 0] rounded_mantissa;
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wire [size_exponent :0] unnormalized_exp;
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wire [size_exponent :0] unnormalized_exp;
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wire [size_mantissa-2:0] final_mantissa;
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wire [size_mantissa-2:0] final_mantissa;
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wire [size_exponent-1:0] final_exponent;
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wire [size_exponent-1:0] final_exponent;
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wire [size_exception_field - 1 : 0] sp_case_result_o;
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wire [size_exception_field - 1 : 0] sp_case_result_o;
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/*
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assign m_a_number = {1'b1, a_number_i[size_mantissa - 2 :0]};
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always
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assign m_b_number = {1'b1, b_number_i[size_mantissa - 2 :0]};
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@(posedge clk, posedge rst)
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assign m_c_number = {1'b1, c_number_i[size_mantissa - 2 :0]};
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begin
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assign e_a_number = a_number_i[size_mantissa + size_exponent - 1 : size_mantissa - 1];
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if (rst)
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assign e_b_number = b_number_i[size_mantissa + size_exponent - 1 : size_mantissa - 1];
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begin
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assign e_c_number = c_number_i[size_mantissa + size_exponent - 1 : size_mantissa - 1];
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m_a_number_reg <= 0;
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assign s_a_number = a_number_i[size - size_exception_field - 1];
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m_b_number_reg <= 0;
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assign s_b_number = b_number_i[size - size_exception_field - 1];
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m_c_number_reg <= 0;
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assign s_c_number = c_number_i[size - size_exception_field - 1];
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e_a_number_reg <= 0;
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assign sp_case_a_number = a_number_i[size - 1 : size - size_exception_field];
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e_b_number_reg <= 0;
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assign sp_case_b_number = b_number_i[size - 1 : size - size_exception_field];
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e_c_number_reg <= 0;
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assign sp_case_c_number = c_number_i[size - 1 : size - size_exception_field];
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s_a_number_reg <= 0;
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s_b_number_reg <= 0;
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s_c_number_reg <= 0;
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sp_case_a_number_reg <= 0;
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sp_case_b_number_reg <= 0;
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sp_case_c_number_reg <= 0;
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end
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else
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begin
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m_a_number_reg <= m_a_number_next;
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m_b_number_reg <= m_b_number_next;
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m_c_number_reg <= m_c_number_next;
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e_a_number_reg <= e_a_number_next;
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e_b_number_reg <= e_b_number_next;
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e_c_number_reg <= e_c_number_next;
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s_a_number_reg <= s_a_number_next;
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s_b_number_reg <= s_b_number_next;
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s_c_number_reg <= s_c_number_next;
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sp_case_a_number_reg <= sp_case_a_number_next;
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sp_case_b_number_reg <= sp_case_b_number_next;
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sp_case_c_number_reg <= sp_case_c_number_next;
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end
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end
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always
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@(*)
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begin
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m_a_number_next = m_a_number_reg;
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m_b_number_next = m_b_number_reg;
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m_c_number_next = m_c_number_reg;
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e_a_number_next = e_a_number_reg;
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e_b_number_next = e_b_number_reg;
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e_c_number_next = e_c_number_reg;
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s_a_number_next = s_a_number_reg;
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s_b_number_next = s_b_number_reg;
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s_c_number_next = s_c_number_reg;
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sp_case_a_number_next = sp_case_a_number_reg;
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sp_case_b_number_next = sp_case_b_number_reg;
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sp_case_c_number_next = sp_case_c_number_reg;
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if (start)
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begin
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m_a_number_next = {1'b1, a_number_i[size_mantissa - 2 : 0]};
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m_b_number_next = {1'b1, b_number_i[size_mantissa - 2 :0]};
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m_c_number_next = {1'b1, c_number_i[size_mantissa - 2 :0]};
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e_a_number_next = a_number_i[size_mantissa + size_exponent - 1 : size_mantissa - 1];
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e_b_number_next = b_number_i[size_mantissa + size_exponent - 1 : size_mantissa - 1];
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e_c_number_next = c_number_i[size_mantissa + size_exponent - 1 : size_mantissa - 1];
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s_a_number_next = a_number_i[size-1];
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s_b_number_next = b_number_i[size-1];
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s_c_number_next = c_number_i[size-1];
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sp_case_a_number_next = a_number_i[size - 1 : size - size_exception_field];
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sp_case_b_number_next = b_number_i[size - 1 : size - size_exception_field];
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sp_case_c_number_next = c_number_i[size - 1 : size - size_exception_field];
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end
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end
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*/
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assign m_a_number_reg = {1'b1, a_number_i[size_mantissa - 2 :0]};
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assign m_b_number_reg = {1'b1, b_number_i[size_mantissa - 2 :0]};
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assign m_c_number_reg = {1'b1, c_number_i[size_mantissa - 2 :0]};
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assign e_a_number_reg = a_number_i[size_mantissa + size_exponent - 1 : size_mantissa - 1];
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assign e_b_number_reg = b_number_i[size_mantissa + size_exponent - 1 : size_mantissa - 1];
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assign e_c_number_reg = c_number_i[size_mantissa + size_exponent - 1 : size_mantissa - 1];
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assign s_a_number_reg = a_number_i[size - size_exception_field - 1];
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assign s_b_number_reg = b_number_i[size - size_exception_field - 1];
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assign s_c_number_reg = c_number_i[size - size_exception_field - 1];
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assign sp_case_a_number_reg = a_number_i[size - 1 : size - size_exception_field];
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assign sp_case_b_number_reg = b_number_i[size - 1 : size - size_exception_field];
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assign sp_case_c_number_reg = c_number_i[size - 1 : size - size_exception_field];
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//-------------------------------------------------------------------------------------
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//instantiate multiply component
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//instantiate multiply component
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multiply #( .size_mantissa(size_mantissa),
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multiply #( .size_mantissa(size_mantissa),
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.size_counter(size_counter),
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.size_counter(size_counter),
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.size_mul_mantissa(size_mul_mantissa))
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.size_mul_mantissa(size_mul_mantissa))
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multiply_instance ( .a_mantissa_i(m_a_number_reg),
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multiply_instance ( .a_mantissa_i(m_a_number),
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.b_mantissa_i(m_b_number_reg),
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.b_mantissa_i(m_b_number),
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.mul_mantissa(mul_mantissa));
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.mul_mantissa(mul_mantissa));
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|
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assign c_mantissa = {1'b0,m_c_number_reg, {(size_mantissa-1'b1){1'b0}}};
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assign exp_ab = e_a_number_reg + e_b_number_reg - ({1'b1,{(size_exponent-1'b1){1'b0}}} - 1'b1);
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assign c_mantissa = {1'b0,m_c_number, {(size_mantissa-1'b1){1'b0}}};
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assign {modify_exp_ab, modify_exp_c, unnormalized_exp} = (exp_ab >= e_c_number_reg)? {8'd0,(exp_ab - e_c_number_reg), exp_ab} : {(e_c_number_reg - exp_ab), 8'd0, e_c_number_reg};
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assign exp_ab = e_a_number + e_b_number - ({1'b1,{(size_exponent-1'b1){1'b0}}} - 1'b1);
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assign {modify_exp_ab, modify_exp_c, unnormalized_exp} = (exp_ab >= e_c_number)? {8'd0,(exp_ab - e_c_number), exp_ab} : {(e_c_number - exp_ab), 8'd0, {1'b0,e_c_number}};
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|
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|
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//instantiate shifter component for mul_mantissa shift, mul_mantissa <=> ab_mantissa
|
//instantiate shifter component for mul_mantissa shift, mul_mantissa <=> ab_mantissa
|
shifter #( .INPUT_SIZE(size_mul_mantissa),
|
shifter #( .INPUT_SIZE(size_mul_mantissa),
|
.SHIFT_SIZE(size_exponent),
|
.SHIFT_SIZE(size_exponent),
|
.OUTPUT_SIZE(size_mul_mantissa + 1'b1),
|
.OUTPUT_SIZE(size_mul_mantissa + 1'b1),
|
.DIRECTION(1'b0), //0=right, 1=left
|
.DIRECTION(1'b0),
|
.PIPELINE(pipeline),
|
.PIPELINE(pipeline),
|
.POSITION(pipeline_pos))
|
.POSITION(pipeline_pos))
|
shifter_ab_instance( .a(mul_mantissa),//mantissa
|
shifter_ab_instance( .a(mul_mantissa),
|
.arith(1'b0),//logical shift
|
.arith(1'b0),
|
.shft(modify_exp_ab),
|
.shft(modify_exp_ab),
|
.shifted_a(ab_shifted_mul_mantissa));//
|
.shifted_a(ab_shifted_mul_mantissa));
|
|
|
|
|
//instantiate shifter component for c_mantissa shift
|
//instantiate shifter component for c_mantissa shift
|
shifter #( .INPUT_SIZE(size_mul_mantissa),
|
shifter #( .INPUT_SIZE(size_mul_mantissa),
|
.SHIFT_SIZE(size_exponent),
|
.SHIFT_SIZE(size_exponent),
|
.OUTPUT_SIZE(size_mul_mantissa + 1'b1),
|
.OUTPUT_SIZE(size_mul_mantissa + 1'b1),
|
.DIRECTION(1'b0), //0=right, 1=left
|
.DIRECTION(1'b0),
|
.PIPELINE(pipeline),
|
.PIPELINE(pipeline),
|
.POSITION(pipeline_pos))
|
.POSITION(pipeline_pos))
|
shifter_c_instance( .a(c_mantissa),//mantissa
|
shifter_c_instance( .a(c_mantissa),
|
.arith(1'b0),//logical shift
|
.arith(1'b0),
|
.shft(modify_exp_c),
|
.shft(modify_exp_c),
|
.shifted_a(c_shifted_mantissa));//
|
.shifted_a(c_shifted_mantissa));
|
|
|
|
|
//instantiate effective_op component
|
//instantiate effective_op component
|
effective_op effective_op_instance( .sign_a(s_a_number_reg),
|
effective_op effective_op_instance( .sign_a(s_a_number),
|
.sign_b(s_b_number_reg),
|
.sign_b(s_b_number),
|
.sign_c(s_c_number_reg),
|
.sign_c(s_c_number),
|
.sub(sub),
|
.sub(sub),
|
.eff_sub(eff_sub));
|
.eff_sub(eff_sub));
|
|
|
|
|
//instantiate compare_exponent component
|
|
compare_exponent #( .size_exponent(size_exponent))
|
|
compare_exponent_instance ( .exp_ab(exp_ab),
|
|
.exp_c(e_c_number_reg),
|
|
.compare(comp_exp));
|
|
|
|
|
|
//instantiate sign_comp component
|
|
sign_comp sign_comp_instance( .sign_a(s_a_number_reg),
|
|
.sign_b(s_b_number_reg),
|
|
.sign_c(s_c_number_reg),
|
|
.comp_exp(comp_exp),
|
|
.eff_sub(eff_sub),
|
|
.sign_add(ovf),
|
|
.sign_res(sign_res));
|
|
|
|
|
|
//instantiate accumulate component
|
//instantiate accumulate component
|
accumulate #( .size_mantissa(size_mantissa),
|
accumulate #( .size_mantissa(size_mantissa),
|
.size_counter(size_counter),
|
.size_counter(size_counter),
|
.size_mul_mantissa(size_mul_mantissa))
|
.size_mul_mantissa(size_mul_mantissa))
|
accumulate_instance ( .ab_number_i(ab_shifted_mul_mantissa[size_mul_mantissa:1]),
|
accumulate_instance ( .ab_number_i(ab_shifted_mul_mantissa[size_mul_mantissa:1]),
|
| Line 238... |
Line 140... |
|
|
//instantiate leading_zeros component
|
//instantiate leading_zeros component
|
leading_zeros #( .SIZE_INT(size_mul_mantissa + 1'b1),
|
leading_zeros #( .SIZE_INT(size_mul_mantissa + 1'b1),
|
.SIZE_COUNTER(size_mul_counter),
|
.SIZE_COUNTER(size_mul_counter),
|
.PIPELINE(pipeline))
|
.PIPELINE(pipeline))
|
leading_zeros_instance( .a(acc_resulting_number),//mantissa
|
leading_zeros_instance( .a(acc_resulting_number),
|
.ovf(ovf), //??????acc_resulting_number[size_mul_mantissa]
|
.ovf(ovf),
|
.lz(lz_mul));
|
.lz(lz_mul));
|
|
|
|
|
//instantiate shifter component
|
//instantiate shifter component
|
shifter #( .INPUT_SIZE(size_mul_mantissa + 1'b1),
|
shifter #( .INPUT_SIZE(size_mul_mantissa + 1'b1),
|
.SHIFT_SIZE(size_mul_counter),
|
.SHIFT_SIZE(size_mul_counter),
|
.OUTPUT_SIZE(size_mul_mantissa + 2'd2),
|
.OUTPUT_SIZE(size_mul_mantissa + 2'd2),
|
.DIRECTION(1'b1), //0=right, 1=left
|
.DIRECTION(1'b1),
|
.PIPELINE(pipeline),
|
.PIPELINE(pipeline),
|
.POSITION(pipeline_pos))
|
.POSITION(pipeline_pos))
|
shifter_instance( .a(acc_resulting_number),//mantissa
|
shifter_instance( .a(acc_resulting_number),
|
.arith(1'b0),//logical shift
|
.arith(1'b0),
|
.shft(lz_mul),
|
.shft(lz_mul),
|
.shifted_a(normalized_mantissa));//resulted mantissa after accumulation --- size_output bits!!!
|
.shifted_a(normalized_mantissa));
|
|
|
|
|
|
//instantiate rounding component
|
|
rounding #( .SIZE_MOST_S_MANTISSA(size_mantissa),
|
|
.SIZE_LEAST_S_MANTISSA(size_mul_mantissa-size_mantissa+2))
|
|
rounding_instance ( .unrounded_mantissa(normalized_mantissa[size_mul_mantissa+1 : size_mul_mantissa+2-size_mantissa]),
|
|
.dummy_bits(normalized_mantissa[size_mul_mantissa+1-size_mantissa : 0]),
|
|
.rounded_mantissa(rounded_mantissa));
|
|
|
|
|
//instantiate special_cases_mul_acc component
|
//instantiate special_cases_mul_acc component
|
special_cases_mul_acc #( .size_exception_field (size_exception_field),
|
special_cases_mul_acc #( .size_exception_field (size_exception_field),
|
.zero (zero ),
|
.zero (zero ),
|
.normal_number (normal_number ),
|
.normal_number (normal_number ),
|
.infinity (infinity ),
|
.infinity (infinity ),
|
.NaN (NaN ))
|
.NaN (NaN ))
|
special_cases_mul_acc_instance ( .sp_case_a_number(sp_case_a_number_reg),
|
special_cases_mul_acc_instance ( .sp_case_a_number(sp_case_a_number),
|
.sp_case_b_number(sp_case_b_number_reg),
|
.sp_case_b_number(sp_case_b_number),
|
.sp_case_c_number(sp_case_c_number_reg),
|
.sp_case_c_number(sp_case_c_number),
|
.sp_case_result_o(sp_case_result_o));
|
.sp_case_result_o(sp_case_result_o));
|
|
|
|
|
|
//compute resulted_sign
|
|
assign sign_res = (eff_sub)? ((c_shifted_mantissa > ab_shifted_mul_mantissa)? s_c_number : ~s_c_number) : s_c_number;
|
|
|
|
|
assign final_exponent = unnormalized_exp - lz_mul + 2'd2;
|
assign final_exponent = unnormalized_exp - lz_mul + 2'd2;
|
assign final_mantissa = normalized_mantissa[size_mul_mantissa : size_mul_mantissa+2-size_mantissa];
|
assign final_mantissa = rounded_mantissa[size_mantissa-2 : 0];
|
assign resulting_number_o = {sp_case_result_o, sign_res, final_exponent, final_mantissa};
|
assign resulting_number_o = {sp_case_result_o, sign_res, final_exponent, final_mantissa};
|
endmodule
|
endmodule
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|
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No newline at end of file
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No newline at end of file
|
