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`timescale 1ns / 1ps
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`timescale 1ns / 1ps
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//////////////////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////////////////
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// Company:
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// Company: UPT
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// Engineer:
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// Engineer: Constantina-Elena Gavriliu
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//
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//
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// Create Date: 16:09:49 11/04/2013
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// Create Date: 16:09:49 11/04/2013
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// Design Name:
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// Design Name:
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// Module Name: SinglePathFPAdder
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// Module Name: SinglePathFPAdder
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// Project Name:
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// Project Name:
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// Target Devices:
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// Target Devices:
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// Tool versions:
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// Tool versions:
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// Description: A ± B
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// Description: A ± B
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// //do not take into consideration cases for which the operation generates a NaN or Infinity exception (with corresponding sign) when initial "special cases" are not such exceptions
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//
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//
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// Dependencies:
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// Dependencies: effective_op.v
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// leading_zeros.v
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// rounding.v
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// shifter.v
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// special_cases.v
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//
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//
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// Revision:
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// Revision:
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// Revision 0.01 - File Created
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// Revision 0.01 - File Created
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// Additional Comments:
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// Additional Comments:
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//
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//
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| Line 48... |
Line 54... |
wire [1 : 0] adjust_exponent;
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wire [1 : 0] adjust_exponent;
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wire [size_exponent - 1 : 0] exp_difference;
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wire [size_exponent - 1 : 0] exp_difference;
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wire [size_exponent : 0] exp_inter;
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wire [size_exponent : 0] exp_inter;
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wire [size_mantissa - 1 : 0] shifted_m_b;
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wire [size_mantissa - 1 : 0] shifted_m_b;
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wire [size_mantissa - 1 : 0] initial_rounding_bits, inter_rounding_bits, final_rounding_bits;
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wire [size_mantissa - 1 : 0] initial_rounding_bits, final_rounding_bits;
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wire [size_mantissa - 2 : 0] inter_rounding_bits;
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wire eff_op;
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wire eff_op;
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wire [size_counter - 1 : 0] lzs;
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wire [size_counter - 1 : 0] lzs;
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wire [size_mantissa + 1 : 0] adder_mantissa;
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wire [size_mantissa + 2 : 0] adder_mantissa;
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wire [size_mantissa + 1 : 0] rounded_mantissa;
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wire [size_mantissa : 0] rounded_mantissa;
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wire [size_mantissa : 0] unnormalized_mantissa, unrounded_mantissa;
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wire [size_mantissa + 1 : 0] unnormalized_mantissa;
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wire [size_mantissa - 1 : 0] unrounded_mantissa;
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wire [size_exception_field - 1 : 0] resulted_exception_field;
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wire [size_exception_field - 1 : 0] resulted_exception_field;
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wire [size_mantissa - 1 : 0] resulted_mantissa;
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wire [size_mantissa - 1 : 0] resulted_mantissa;
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wire [size_exponent - 1 : 0] resulted_exponent;
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wire [size_exponent - 1 : 0] resulted_exponent;
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wire resulted_sign;
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wire resulted_sign;
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wire dummy_bit;
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wire [1:0] dummy_bits;
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wire zero_flag;
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wire zero_flag;
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wire [4:0] sign_cases;
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wire dummy_ovf, correction, negation_cond;
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reg intermediar_sign;
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assign e_a_number = a_number_i[size_mantissa + size_exponent - 1 : size_mantissa - 1];
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assign e_a_number = a_number_i[size_mantissa + size_exponent - 1 : size_mantissa - 1];
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assign e_b_number = b_number_i[size_mantissa + size_exponent - 1 : size_mantissa - 1];
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assign e_b_number = b_number_i[size_mantissa + size_exponent - 1 : size_mantissa - 1];
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assign s_a_number = a_number_i[size - size_exception_field - 1];
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assign s_a_number = a_number_i[size - size_exception_field - 1];
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assign s_b_number = b_number_i[size - size_exception_field - 1];
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assign s_b_number = b_number_i[size - size_exception_field - 1];
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assign sp_case_a_number = a_number_i[size - 1 : size - size_exception_field];
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assign sp_case_a_number = a_number_i[size - 1 : size - size_exception_field];
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assign sp_case_b_number = b_number_i[size - 1 : size - size_exception_field];
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assign sp_case_b_number = b_number_i[size - 1 : size - size_exception_field];
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//find the greater exponent
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//find the greater exponent
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assign a_greater_exponent = e_a_number - e_b_number;
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assign a_greater_exponent = e_a_number - e_b_number;
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assign b_greater_exponent = e_b_number - e_a_number;
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assign b_greater_exponent = e_b_number - e_a_number;
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//find the difference between exponents
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//find the difference between exponents
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| Line 85... |
Line 95... |
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//set shifter always on m_b_number
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//set shifter always on m_b_number
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assign {m_a_number, m_b_number} = (b_greater_exponent[size_exponent])?
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assign {m_a_number, m_b_number} = (b_greater_exponent[size_exponent])?
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{{1'b1, a_number_i[size_mantissa - 2 :0]}, {1'b1, b_number_i[size_mantissa - 2 :0]}} :
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{{1'b1, a_number_i[size_mantissa - 2 :0]}, {1'b1, b_number_i[size_mantissa - 2 :0]}} :
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{{1'b1, b_number_i[size_mantissa - 2 :0]}, {1'b1, a_number_i[size_mantissa - 2 :0]}};
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{{1'b1, b_number_i[size_mantissa - 2 :0]}, {1'b1, a_number_i[size_mantissa - 2 :0]}};
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//shift m_b_number
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//shift m_b_number
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shifter #( .INPUT_SIZE(size_mantissa),
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shifter #( .INPUT_SIZE(size_mantissa),
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.SHIFT_SIZE(size_exponent),
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.SHIFT_SIZE(size_exponent),
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.OUTPUT_SIZE(double_size_mantissa),
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.OUTPUT_SIZE(double_size_mantissa),
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.DIRECTION(1'b0), //0=right, 1=left
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.DIRECTION(1'b0), //0=right, 1=left
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| Line 101... |
Line 110... |
.shifted_a({shifted_m_b, initial_rounding_bits}));
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.shifted_a({shifted_m_b, initial_rounding_bits}));
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//istantiate effective_operation_component
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//istantiate effective_operation_component
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effective_op effective_op_instance( .a_sign(s_a_number), .b_sign(s_b_number), .sub(sub), .eff_op(eff_op));
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effective_op effective_op_instance( .a_sign(s_a_number), .b_sign(s_b_number), .sub(sub), .eff_op(eff_op));
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//compute addition
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assign adder_mantissa = (eff_op)? ({1'b0, m_a_number, 1'b0} - {1'b0, shifted_m_b, initial_rounding_bits[size_mantissa - 1]}) :
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({1'b0, m_a_number, 1'b0} + {1'b0, shifted_m_b, initial_rounding_bits[size_mantissa - 1]});
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//compute unnormalized_mantissa
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//compute unnormalized_mantissa
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assign adder_mantissa = (eff_op)? ({1'b0, m_a_number} - {1'b0, shifted_m_b}) : ({1'b0, m_a_number} + {1'b0, shifted_m_b});
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assign unnormalized_mantissa = (adder_mantissa[size_mantissa + 2])? ~adder_mantissa[size_mantissa + 1 : 0] : adder_mantissa[size_mantissa + 1 : 0];
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assign {unnormalized_mantissa, inter_rounding_bits} =
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assign inter_rounding_bits = (~(|exp_difference[size_exponent - 1 : 1]))?
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(adder_mantissa[size_mantissa + 1])? ({~adder_mantissa[size_mantissa : 0], ~initial_rounding_bits}) :
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((adder_mantissa[size_mantissa + 2]? ~initial_rounding_bits[size_mantissa - 2 : 0] : initial_rounding_bits[size_mantissa - 2 : 0])) :
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({adder_mantissa[size_mantissa : 0], initial_rounding_bits});
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((eff_op)? ((|initial_rounding_bits[size_mantissa - 2 : 0])?~initial_rounding_bits[size_mantissa - 2 : 0] : initial_rounding_bits[size_mantissa - 2 : 0]) : initial_rounding_bits[size_mantissa - 2 : 0]);
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//compute leading_zeros over unnormalized mantissa
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//compute leading_zeros over unnormalized mantissa
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leading_zeros #( .SIZE_INT(size_mantissa + 1), .SIZE_COUNTER(size_counter), .PIPELINE(pipeline))
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leading_zeros #( .SIZE_INT(size_mantissa + 2), .SIZE_COUNTER(size_counter), .PIPELINE(pipeline))
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leading_zeros_instance (.a(unnormalized_mantissa[size_mantissa : 0]),
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leading_zeros_instance (.a(unnormalized_mantissa[size_mantissa + 1 : 0]),
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.ovf(unnormalized_mantissa[size_mantissa]),
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.ovf(unnormalized_mantissa[size_mantissa + 1]),
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.lz(lzs));
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.lz(lzs));
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//compute shifting over unnormalized_mantissa
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//compute shifting over unnormalized_mantissa
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shifter #( .INPUT_SIZE(double_size_mantissa + 1),
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shifter #( .INPUT_SIZE(double_size_mantissa + 1),
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.SHIFT_SIZE(size_counter),
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.SHIFT_SIZE(size_counter),
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.OUTPUT_SIZE(double_size_mantissa + 2),
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.OUTPUT_SIZE(double_size_mantissa + 2),
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.DIRECTION(1'b1), //0=right, 1=left
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.DIRECTION(1'b1), //0=right, 1=left
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.PIPELINE(pipeline),
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.PIPELINE(pipeline),
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.POSITION(pipeline_pos))
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.POSITION(pipeline_pos))
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shifter_instance( .a({unnormalized_mantissa, inter_rounding_bits}),//mantissa
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shifter_instance( .a({unnormalized_mantissa, inter_rounding_bits}),//mantissa
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.arith(1'b0),//logical shift
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.arith(inter_rounding_bits[0]),//logical shift
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.shft(lzs),
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.shft(lzs),
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.shifted_a({unrounded_mantissa, final_rounding_bits, dummy_bit}));
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.shifted_a({unrounded_mantissa, final_rounding_bits, dummy_bits}));
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assign correction = ~(|exp_difference[size_exponent - 1 : 1])? 1'b0 :
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(eff_op? ((|initial_rounding_bits[size_mantissa - 2 : 0])?
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((adder_mantissa[0] | ((~adder_mantissa[0]) & (~adder_mantissa[size_mantissa]) & (~initial_rounding_bits[size_mantissa - 1])
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& (~(&final_rounding_bits[size_mantissa-2 : 0]))))? 1'b1 : 1'b0) : 1'b0) : 1'b0);
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//instantiate rounding_component
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//instantiate rounding_component
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rounding #( .SIZE_MOST_S_MANTISSA(size_mantissa + 2),
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rounding #( .SIZE_MOST_S_MANTISSA(size_mantissa + 1),
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.SIZE_LEAST_S_MANTISSA(size_mantissa))
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.SIZE_LEAST_S_MANTISSA(size_mantissa))
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rounding_instance( .unrounded_mantissa({1'b0, unrounded_mantissa}),
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rounding_instance( .unrounded_mantissa({1'b0, unrounded_mantissa}),
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.dummy_bits(final_rounding_bits),
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.dummy_bits(final_rounding_bits),
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.eff_op(eff_op),
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.correction(correction),
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.rounded_mantissa(rounded_mantissa));
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.rounded_mantissa(rounded_mantissa));
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//adjust exponent in case of overflow
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//adjust exponent in case of overflow
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assign adjust_exponent = (rounded_mantissa[size_mantissa + 1])? 2'd2 : 2'd1;
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assign adjust_exponent = (rounded_mantissa[size_mantissa])? 2'd2 : 2'd1;
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//compute resulted_exponent
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//compute resulted_exponent
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assign unadjusted_exponent = exp_inter - lzs;
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assign unadjusted_exponent = exp_inter - lzs;
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assign resulted_exponent = unadjusted_exponent + adjust_exponent;
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assign resulted_exponent = unadjusted_exponent + adjust_exponent;
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assign resulted_mantissa = (rounded_mantissa[size_mantissa + 1])? (rounded_mantissa[size_mantissa + 1 : 2]) : (rounded_mantissa[size_mantissa : 1]);
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assign resulted_mantissa = (rounded_mantissa[size_mantissa])? (rounded_mantissa[size_mantissa : 1]) : (rounded_mantissa[size_mantissa - 1 : 0]);
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//compute exception_field
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//compute exception_field
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special_cases #( .size_exception_field(size_exception_field),
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special_cases #( .size_exception_field(size_exception_field),
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.zero(zero),
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.zero(zero),
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.normal_number(normal_number),
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.normal_number(normal_number),
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.infinity(infinity),
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.infinity(infinity),
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.NaN(NaN))
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.NaN(NaN))
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special_cases_instance( .sp_case_a_number(sp_case_a_number),
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special_cases_instance( .sp_case_a_number(sp_case_a_number),
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.sp_case_b_number(sp_case_b_number),
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.sp_case_b_number(sp_case_b_number),
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.eff_op(eff_op),
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.sp_case_result_o(resulted_exception_field));
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.sp_case_result_o(resulted_exception_field));
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//set zero_flag in case of equal numbers
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//set zero_flag in case of equal numbers
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assign zero_flag = ~((|{resulted_mantissa,resulted_exception_field[1]}) & (|resulted_exception_field));
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assign zero_flag = ~((|{resulted_mantissa,resulted_exception_field[1]}) & (|resulted_exception_field));
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//compute resulted_sign
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assign sign_cases = {eff_op, s_a_number, s_b_number, a_greater_exponent[size_exponent], b_greater_exponent[size_exponent]};
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assign resulted_sign = (eff_op)?
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(!a_greater_exponent[size_exponent]? (!b_greater_exponent[size_exponent]? ~adder_mantissa[size_mantissa+1] : s_a_number) : ~s_b_number) :
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s_a_number;
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assign resulted_number_o = (zero_flag)? {size{1'b0}} :
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always
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@(*)
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begin
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case (sign_cases)
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5'b00000: intermediar_sign = 1'b0;
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5'b00001: intermediar_sign = 1'b0;
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5'b00010: intermediar_sign = 1'b0;
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5'b10000: intermediar_sign = ~adder_mantissa[size_mantissa+1];
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5'b10001: intermediar_sign = 1'b0;
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5'b10010: intermediar_sign = 1'b1;
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5'b10100: intermediar_sign = ~adder_mantissa[size_mantissa+1];
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5'b10101: intermediar_sign = 1'b0;
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5'b10110: intermediar_sign = 1'b1;
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5'b00100: intermediar_sign = 1'b0;
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5'b00101: intermediar_sign = 1'b0;
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5'b00110: intermediar_sign = 1'b0;
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5'b11000: intermediar_sign = adder_mantissa[size_mantissa+1];
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5'b11001: intermediar_sign = 1'b1;
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5'b11010: intermediar_sign = 1'b0;
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5'b01000: intermediar_sign = 1'b1;
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5'b01001: intermediar_sign = 1'b1;
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5'b01010: intermediar_sign = 1'b1;
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5'b01100: intermediar_sign = 1'b1;
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5'b01101: intermediar_sign = 1'b1;
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5'b01110: intermediar_sign = 1'b1;
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5'b11100: intermediar_sign = adder_mantissa[size_mantissa+1];
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5'b11101: intermediar_sign = 1'b1;
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5'b11110: intermediar_sign = 1'b0;
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default: intermediar_sign = 1'b1;
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endcase
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end
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assign resulted_sign = intermediar_sign;
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assign resulted_number_o = (zero_flag | (~(|resulted_exception_field)))? {size{1'b0}} :
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(&(resulted_exception_field))? {resulted_exception_field, resulted_sign,{(size-1-size_exception_field){1'b0}}} :
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(resulted_exception_field[1])? {resulted_exception_field, {(size-size_exception_field){1'b0}}} :
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(!sp_case_a_number)? {b_number_i[size-1 : size-size_exception_field], resulted_sign, b_number_i[size-1-size_exception_field-1 : 0]} :
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(!sp_case_b_number)? {a_number_i[size-1 : size-size_exception_field], resulted_sign, a_number_i[size-1-size_exception_field-1 : 0]} :
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{resulted_exception_field, resulted_sign, resulted_exponent, resulted_mantissa[size_mantissa - 2 : 0]};
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{resulted_exception_field, resulted_sign, resulted_exponent, resulted_mantissa[size_mantissa - 2 : 0]};
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endmodule
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endmodule
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No newline at end of file
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No newline at end of file
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