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[/] [xucpu/] [trunk/] [src/] [components/] [BRAM/] [tb_generic_ram.vhdl] - Diff between revs 25 and 26
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Rev 26 |
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ENTITY tb_generic_ram IS
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ENTITY tb_generic_ram IS
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END ENTITY tb_generic_ram;
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END ENTITY tb_generic_ram;
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ARCHITECTURE Structural OF tb_generic_ram IS
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ARCHITECTURE Structural OF tb_generic_ram IS
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CONSTANT w_addr : INTEGER := 10;
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CONSTANT w_addr : INTEGER := 15;
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SIGNAL clock : STD_LOGIC := '0';
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SIGNAL clock : STD_LOGIC := '0';
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SIGNAL we : STD_LOGIC := '0';
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SIGNAL we : STD_LOGIC := '0';
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SIGNAL data_a : STD_LOGIC_VECTOR(w_addr - 1 DOWNTO 0) := (OTHERS => '0');
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SIGNAL data_a : STD_LOGIC_VECTOR(w_addr - 1 DOWNTO 0) := (OTHERS => '0');
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SIGNAL inst_a : STD_LOGIC_VECTOR(w_addr - 1 DOWNTO 0);
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SIGNAL inst_a : STD_LOGIC_VECTOR(w_addr - 1 DOWNTO 0);
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