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#define XULA25
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////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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// Filename: busmaster_tb.cpp
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// Filename: busmaster_tb.cpp
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//
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//
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// Project: FPGA library development (XuLA2 development board)
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// Project: FPGA library development (XuLA2 development board)
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// Set up the bus before any clock tick
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// Set up the bus before any clock tick
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m_core->i_clk = 1;
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m_core->i_clk = 1;
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flash_miso = (m_flash(m_core->o_sf_cs_n,
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flash_miso = (m_flash(m_core->o_sf_cs_n,
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m_core->o_spi_sck,
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m_core->o_spi_sck,
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m_core->o_spi_mosi)&0x02)?1:0;
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m_core->o_spi_mosi)&0x02)?1:0;
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#ifdef XULA25
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sdcard_miso = m_sdcard(m_core->o_sd_cs_n, m_core->o_spi_sck,
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sdcard_miso = m_sdcard(m_core->o_sd_cs_n, m_core->o_spi_sck,
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m_core->o_spi_mosi);
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m_core->o_spi_mosi);
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#endif
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if ((m_core->o_sf_cs_n)&&(m_core->o_sd_cs_n))
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if ((m_core->o_sf_cs_n)&&(m_core->o_sd_cs_n))
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m_core->i_spi_miso = 1;
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m_core->i_spi_miso = 1;
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else if ((!m_core->o_sf_cs_n)&&(m_core->o_sd_cs_n))
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else if ((!m_core->o_sf_cs_n)&&(m_core->o_sd_cs_n))
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m_core->i_spi_miso = flash_miso;
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m_core->i_spi_miso = flash_miso;
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m_core->i_rx_uart = m_uart(m_core->o_tx_uart,
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m_core->i_rx_uart = m_uart(m_core->o_tx_uart,
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m_core->v__DOT__serialport__DOT__r_setup);
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m_core->v__DOT__serialport__DOT__r_setup);
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PIPECMDR::tick();
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PIPECMDR::tick();
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// #define DEBUGGING_OUTPUT
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// #define DEBUGGING_OUTPUT
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#define XULA25
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#ifdef DEBUGGING_OUTPUT
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#ifdef DEBUGGING_OUTPUT
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bool writeout = false;
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bool writeout = false;
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/*
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/*
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if (m_core->v__DOT__sdram__DOT__r_pending)
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if (m_core->v__DOT__sdram__DOT__r_pending)
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writeout = true;
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writeout = true;
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