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https://opencores.org/ocsvn/xulalx25soc/xulalx25soc/trunk
[/] [xulalx25soc/] [trunk/] [rtl/] [busmaster.v] - Diff between revs 2 and 6
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| Rev 2 |
Rev 6 |
| Line 113... |
Line 113... |
wire [31:0] wbu_idata;
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wire [31:0] wbu_idata;
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// And then headed back home
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// And then headed back home
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wire w_interrupt;
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wire w_interrupt;
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// Oh, and the debug control for the ZIP CPU
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// Oh, and the debug control for the ZIP CPU
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wire wbu_zip_sel, zip_dbg_ack, zip_dbg_stall;
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wire wbu_zip_sel, zip_dbg_ack, zip_dbg_stall;
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assign wbu_zip_sel =((wbu_cyc)&&(wbu_addr[31: 1]== 31'h083));
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assign wbu_zip_sel =((wbu_cyc)&&(wbu_addr[24]);
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wire [31:0] zip_dbg_data;
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wire [31:0] zip_dbg_data;
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wbubus genbus(i_clk, i_rx_stb, i_rx_data,
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wbubus genbus(i_clk, i_rx_stb, i_rx_data,
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wbu_cyc, wbu_stb, wbu_we, wbu_addr, wbu_data,
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wbu_cyc, wbu_stb, wbu_we, wbu_addr, wbu_data,
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`ifdef INCLUDE_ZIPCPU
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`ifdef INCLUDE_ZIPCPU
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((~wbu_zip_sel)&&(wbu_ack))
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((~wbu_zip_sel)&&(wbu_ack))
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