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[/] [xulalx25soc/] [trunk/] [rtl/] [cpu/] [pipemem.v] - Diff between revs 52 and 66
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Rev 52 |
Rev 66 |
Line 158... |
Line 158... |
assign o_busy = cyc;
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assign o_busy = cyc;
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always @(posedge i_clk)
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always @(posedge i_clk)
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o_wreg <= fifo_oreg[rdaddr];
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o_wreg <= fifo_oreg[rdaddr];
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always @(posedge i_clk)
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always @(posedge i_clk)
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if (i_wb_ack)
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// if (i_wb_ack) isn't necessary, since o_valid won't be true
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// then either.
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o_result <= i_wb_data;
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o_result <= i_wb_data;
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assign o_pipe_stalled = (cyc)
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assign o_pipe_stalled = (cyc)
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&&((i_wb_stall)||((~o_wb_stb_lcl)&&(~o_wb_stb_gbl)));
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&&((i_wb_stall)||((~o_wb_stb_lcl)&&(~o_wb_stb_gbl)));
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