| Line 66... |
Line 66... |
// GPIO
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// GPIO
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input [(NGPI-1):0] i_gpio;
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input [(NGPI-1):0] i_gpio;
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output wire [(NGPO-1):0] o_gpio;
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output wire [(NGPO-1):0] o_gpio;
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// Other registers
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// Other registers
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input [31:0] i_bus_err_addr;
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input [31:0] i_bus_err_addr;
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input [5:0] brd_interrupts;
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input [6:0] brd_interrupts;
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output wire [7:0] o_ints_to_zip_cpu;
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output wire [8:0] o_ints_to_zip_cpu;
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output wire o_interrupt;
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output wire o_interrupt;
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wire i_uart_rx_int, i_uart_tx_int, i_scop_int, i_flash_int,i_pwm_int;
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wire i_sdcard_int, i_uart_tx_int, i_uart_rx_int, i_pwm_int,
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i_scop_int, i_flash_int;
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assign i_sdcard_int = brd_interrupts[6];
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assign i_uart_tx_int = brd_interrupts[5];
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assign i_uart_tx_int = brd_interrupts[5];
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assign i_uart_rx_int = brd_interrupts[4];
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assign i_uart_rx_int = brd_interrupts[4];
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assign i_pwm_int = brd_interrupts[3];
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assign i_pwm_int = brd_interrupts[3];
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assign i_scop_int = brd_interrupts[2];
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assign i_scop_int = brd_interrupts[2];
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assign i_flash_int = brd_interrupts[1];
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assign i_flash_int = brd_interrupts[1];
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| Line 189... |
Line 191... |
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assign o_wb_data = (r_wb_addr)? ck_data : r_wb_data;
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assign o_wb_data = (r_wb_addr)? ck_data : r_wb_data;
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//
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//
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//
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//
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assign o_ints_to_zip_cpu = { i_uart_tx_int, i_uart_rx_int,
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assign o_ints_to_zip_cpu = { i_sdcard_int,
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i_uart_tx_int, i_uart_rx_int,
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i_pwm_int, gpio_int, i_scop_int, i_flash_int,
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i_pwm_int, gpio_int, i_scop_int, i_flash_int,
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ck_int, o_interrupt };
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ck_int, o_interrupt };
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endmodule
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endmodule
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No newline at end of file
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No newline at end of file
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