| Line 80... |
Line 80... |
assign i_scop_int = brd_interrupts[2];
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assign i_scop_int = brd_interrupts[2];
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assign i_flash_int = brd_interrupts[1];
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assign i_flash_int = brd_interrupts[1];
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|
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// reg [31:0] pwrcount;
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// reg [31:0] pwrcount;
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// reg [31:0] rtccount;
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// reg [31:0] rtccount;
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wire [31:0] ictrl_data, gpio_data, date_data;
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wire [31:0] ictrl_data, gpio_data, date_data, timer_data;
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|
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reg [31:0] r_wb_data;
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reg [31:0] r_wb_data;
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reg r_wb_addr;
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reg r_wb_addr;
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always @(posedge i_clk)
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always @(posedge i_clk)
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begin
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begin
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| Line 102... |
Line 102... |
// endcase
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// endcase
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// end else
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// end else
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if ((i_wb_cyc)&&(i_wb_stb)&&(~i_wb_we))
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if ((i_wb_cyc)&&(i_wb_stb)&&(~i_wb_we))
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begin
|
begin
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casez(i_wb_addr[3:0])
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casez(i_wb_addr[3:0])
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4'h02: r_wb_data <= `DATESTAMP;
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4'h01: r_wb_data <= `DATESTAMP;
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4'h03: r_wb_data <= ictrl_data;
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4'h02: r_wb_data <= ictrl_data;
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4'h04: r_wb_data <= i_bus_err_addr;
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4'h03: r_wb_data <= i_bus_err_addr;
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4'h04: r_wb_data <= timer_data;
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4'h05: r_wb_data <= date_data;
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4'h05: r_wb_data <= date_data;
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4'h06: r_wb_data <= gpio_data;
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4'h06: r_wb_data <= gpio_data;
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default: r_wb_data <= 32'h0000;
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default: r_wb_data <= 32'h0000;
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endcase
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endcase
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end
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end
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end
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end
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|
|
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// The Zip Timer
|
|
wire tm_int, tm_ack, tm_stall;
|
|
ziptimer timer(i_clk, 1'b0, 1'b1,
|
|
(i_wb_cyc),(i_wb_stb)&&(i_wb_addr==5'h04),
|
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i_wb_we, i_wb_data,
|
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tm_ack, tm_stall, timer_data, tm_int);
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|
|
// The interrupt controller
|
// The interrupt controller
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wire ck_int;
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wire ck_int;
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wire [7:0] interrupt_vector;
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wire [8:0] interrupt_vector;
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assign interrupt_vector = {
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assign interrupt_vector = { tm_int,
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i_uart_tx_int, i_uart_rx_int, i_pwm_int, gpio_int,
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i_uart_tx_int, i_uart_rx_int, i_pwm_int, gpio_int,
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i_scop_int, i_flash_int, ck_int, brd_interrupts[0] };
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i_scop_int, i_flash_int, ck_int, brd_interrupts[0] };
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icontrol #(8) intcontroller(i_clk, 1'b0,
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icontrol #(9) intcontroller(i_clk, 1'b0,
|
((i_wb_cyc)&&(i_wb_stb)&&(i_wb_we)
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((i_wb_cyc)&&(i_wb_stb)&&(i_wb_we)
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&&(i_wb_addr==5'h3)), i_wb_data,
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&&(i_wb_addr==5'h2)), i_wb_data,
|
ictrl_data, interrupt_vector,
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ictrl_data, interrupt_vector,
|
o_interrupt);
|
o_interrupt);
|
|
|
/*
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/*
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// The ticks since power up register
|
// The ticks since power up register
|
