Line 41... |
Line 41... |
`define SPI_BITS 3'h2
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`define SPI_BITS 3'h2
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`define SPI_READY 3'h3
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`define SPI_READY 3'h3
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`define SPI_HOLDING 3'h4
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`define SPI_HOLDING 3'h4
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`define SPI_STOP 3'h5
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`define SPI_STOP 3'h5
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`define SPI_STOP_B 3'h6
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`define SPI_STOP_B 3'h6
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`define SPI_WAIT 3'h7
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// Modes
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// Modes
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// `define SPI_MOD_SPI 2'b00
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// `define SPI_MOD_SPI 2'b00
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// `define QSPI_MOD_QOUT 2'b10
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// `define QSPI_MOD_QOUT 2'b10
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// `define QSPI_MOD_QIN 2'b11
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// `define QSPI_MOD_QIN 2'b11
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Line 52... |
Line 53... |
module lldspi(i_clk,
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module lldspi(i_clk,
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// Module interface
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// Module interface
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i_wr, i_hold, i_word, i_len,
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i_wr, i_hold, i_word, i_len,
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o_word, o_valid, o_busy,
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o_word, o_valid, o_busy,
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// QSPI interface
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// QSPI interface
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o_sck, o_cs_n, i_cs_n, o_mosi, i_miso);
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o_sck, o_cs_n, i_cs_n, o_mosi, i_miso,
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// Bus grant information
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i_bus_grant);
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input i_clk;
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input i_clk;
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// Chip interface
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// Chip interface
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// Can send info
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// Can send info
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// i_hold = 0, i_wr = 1,
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// i_hold = 0, i_wr = 1,
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// i_word = { 1'b0, 32'info to send },
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// i_word = { 1'b0, 32'info to send },
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Line 70... |
Line 73... |
output reg o_sck;
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output reg o_sck;
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output reg o_cs_n;
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output reg o_cs_n;
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input i_cs_n; // Feedback from the arbiter
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input i_cs_n; // Feedback from the arbiter
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output reg o_mosi;
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output reg o_mosi;
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input i_miso;
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input i_miso;
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// Bus grant
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input i_bus_grant;
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reg [5:0] spi_len;
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reg [5:0] spi_len;
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reg [31:0] r_word;
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reg [31:0] r_word;
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reg [30:0] r_input;
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reg [30:0] r_input;
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reg [2:0] state;
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reg [2:0] state;
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Line 91... |
Line 96... |
o_valid <= 1'b0;
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o_valid <= 1'b0;
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o_busy <= 1'b0;
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o_busy <= 1'b0;
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if (i_wr)
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if (i_wr)
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begin
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begin
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r_word <= i_word;
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r_word <= i_word;
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state <= `SPI_START;
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state <= `SPI_WAIT;
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spi_len<= { 1'b0, i_len, 3'b000 } + 6'h8;
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spi_len<= { 1'b0, i_len, 3'b000 } + 6'h8;
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o_cs_n <= 1'b0;
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o_cs_n <= 1'b0;
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o_busy <= 1'b1;
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o_busy <= 1'b1;
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o_sck <= 1'b1;
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o_sck <= 1'b1;
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end
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end
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end else if (state == `SPI_WAIT)
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begin
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if (i_bus_grant)
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state <= `SPI_START;
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end else if (state == `SPI_START)
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end else if (state == `SPI_START)
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begin // We come in here with sck high, stay here 'til sck is low
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begin // We come in here with sck high, stay here 'til sck is low
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if (~i_cs_n) // Wait 'til the bus has been granted
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if (~i_cs_n) // Wait 'til the bus has been granted
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o_sck <= 1'b0;
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o_sck <= 1'b0;
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if (o_sck == 1'b0)
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if (o_sck == 1'b0)
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