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[/] [xulalx25soc/] [trunk/] [rtl/] [memdev.v] - Diff between revs 55 and 113

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Rev 55 Rev 113
Line 47... Line 47...
 
 
        reg     [(DW-1):0]       mem     [0:((1<<AW)-1)];
        reg     [(DW-1):0]       mem     [0:((1<<AW)-1)];
        always @(posedge i_clk)
        always @(posedge i_clk)
                o_wb_data <= mem[i_wb_addr];
                o_wb_data <= mem[i_wb_addr];
        always @(posedge i_clk)
        always @(posedge i_clk)
                if ((i_wb_cyc)&&(i_wb_stb)&&(i_wb_we))
                if ((i_wb_stb)&&(i_wb_we))
                        mem[i_wb_addr] <= i_wb_data;
                        mem[i_wb_addr] <= i_wb_data;
        always @(posedge i_clk)
        always @(posedge i_clk)
                o_wb_ack <= (i_wb_cyc)&&(i_wb_stb);
                o_wb_ack <= (i_wb_stb);
        assign  o_wb_stall = 1'b0;
        assign  o_wb_stall = 1'b0;
 
 
endmodule
endmodule
 
 
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