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[/] [xulalx25soc/] [trunk/] [rtl/] [wbgpio.v] - Diff between revs 2 and 7

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//
//
// Filename:    wbgpio.v
// Filename:    wbgpio.v
//
//
// Project:     XuLA2 board
// Project:     XuLA2 board
//
//
// Purpose:     
// Purpose:     This extremely simple GPIO controller, although minimally 
 
//              featured, is designed to control up to sixteen general purpose
 
//      input and sixteen general purpose output lines of a module from a
 
//      single address on a 32-bit wishbone bus.
 
//
 
//      Input GPIO values are contained in the top 16-bits.  Any change in
 
//      input values will generate an interrupt.
 
//
 
//      Output GPIO values are contained in the bottom 16-bits.  To change an
 
//      output GPIO value, writes to this port must also set a bit in the
 
//      upper sixteen bits.  Hence, to set GPIO output zero, one would write
 
//      a 0x010001 to the port, whereas a 0x010000 would clear the bit.  This
 
//      interface makes it possible to change only the bit of interest, without
 
//      needing to capture and maintain the prior bit values--something that
 
//      might be difficult from a interrupt context within a CPU.
 
//      
//
//
//
//
// Creator:     Dan Gisselquist, Ph.D.
// Creator:     Dan Gisselquist, Ph.D.
//              Gisselquist Technology, LLC
//              Gisselquist Technology, LLC
//
//

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