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[/] [xulalx25soc/] [trunk/] [rtl/] [wbgpio.v] - Diff between revs 2 and 7
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//
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//
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// Filename: wbgpio.v
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// Filename: wbgpio.v
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//
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//
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// Project: XuLA2 board
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// Project: XuLA2 board
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//
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//
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// Purpose:
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// Purpose: This extremely simple GPIO controller, although minimally
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// featured, is designed to control up to sixteen general purpose
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// input and sixteen general purpose output lines of a module from a
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// single address on a 32-bit wishbone bus.
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//
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// Input GPIO values are contained in the top 16-bits. Any change in
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// input values will generate an interrupt.
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//
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// Output GPIO values are contained in the bottom 16-bits. To change an
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// output GPIO value, writes to this port must also set a bit in the
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// upper sixteen bits. Hence, to set GPIO output zero, one would write
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// a 0x010001 to the port, whereas a 0x010000 would clear the bit. This
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// interface makes it possible to change only the bit of interest, without
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// needing to capture and maintain the prior bit values--something that
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// might be difficult from a interrupt context within a CPU.
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//
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//
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//
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//
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//
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// Creator: Dan Gisselquist, Ph.D.
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// Creator: Dan Gisselquist, Ph.D.
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// Gisselquist Technology, LLC
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// Gisselquist Technology, LLC
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//
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//
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