URL
https://opencores.org/ocsvn/xulalx25soc/xulalx25soc/trunk
[/] [xulalx25soc/] [trunk/] [rtl/] [wbufifo.v] - Diff between revs 59 and 102
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
Rev 59 |
Rev 102 |
Line 1... |
Line 1... |
////////////////////////////////////////////////////////////////////////////////
|
////////////////////////////////////////////////////////////////////////////////
|
//
|
//
|
// Filename: wbufifo.v
|
// Filename: wbufifo.v
|
//
|
//
|
// Project: XuLA2 board
|
// Project: FPGA library
|
//
|
//
|
// Purpose: This was once a FIFO for a UART ... but now it works as a
|
// Purpose: This was once a FIFO for a UART ... but now it works as a
|
// synchronous FIFO for JTAG-wishbone conversion 36-bit codewords.
|
// synchronous FIFO for JTAG-wishbone conversion 36-bit codewords.
|
//
|
//
|
//
|
//
|
© copyright 1999-2025
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.