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//
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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// Filename: cpuscope.cpp
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// Filename: cpuscope.cpp
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//
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//
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// Project: FPGA library development (Basys-3 development board)
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// Project: XuLA2-LX25 SoC based upon the ZipCPU
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//
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//
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// Purpose: To read out, and decompose, the results of the wishbone scope
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// Purpose: To read out, and decompose, the results of the wishbone scope
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// as applied to the ICAPE2 interaction.
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// as applied to the ICAPE2 interaction.
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//
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//
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// Creator: Dan Gisselquist
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// Creator: Dan Gisselquist, Ph.D.
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// Gisselquist Tecnology, LLC
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// Gisselquist Technology, LLC
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//
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////////////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2015-2016, Gisselquist Technology, LLC
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//
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// This program is free software (firmware): you can redistribute it and/or
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// modify it under the terms of the GNU General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or (at
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// your option) any later version.
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//
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// This program is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with this program. (It's in the $(ROOT)/doc directory, run make with no
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// target there if the PDF file isn't present.) If not, see
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// <http://www.gnu.org/licenses/> for a copy.
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//
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//
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// Copyright: 2015
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// License: GPL, v3, as defined and found on www.gnu.org,
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// http://www.gnu.org/licenses/gpl.html
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//
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//
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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//
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//
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#include <stdio.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include <unistd.h>
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unsigned r = brev(v&0x0ff);
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unsigned r = brev(v&0x0ff);
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r |= brev((v>>8)&0x0ff)<<8;
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r |= brev((v>>8)&0x0ff)<<8;
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return r;
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return r;
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}
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}
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void decode(DEVBUS::BUSW val) {
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}
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int main(int argc, char **argv) {
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int main(int argc, char **argv) {
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FPGAOPEN(m_fpga);
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int skp=0, port = FPGAPORT;
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bool use_usb = true;
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skp=1;
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for(int argn=0; argn<argc-skp; argn++) {
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if (argv[argn+skp][0] == '-') {
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if (argv[argn+skp][1] == 'u')
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use_usb = true;
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else if (argv[argn+skp][1] == 'p') {
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use_usb = false;
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if (isdigit(argv[argn+skp][2]))
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port = atoi(&argv[argn+skp][2]);
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}
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skp++; argn--;
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} else
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argv[argn] = argv[argn+skp];
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} argc -= skp;
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if (use_usb)
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m_fpga = new FPGA(new USBI());
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else
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m_fpga = new FPGA(new NETCOMMS(FPGAHOST, port));
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signal(SIGSTOP, closeup);
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signal(SIGSTOP, closeup);
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signal(SIGHUP, closeup);
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signal(SIGHUP, closeup);
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unsigned v, lgln, scoplen;
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unsigned v, lgln, scoplen;
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Line 79... |
Line 126... |
scoplen = (1<<lgln);
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scoplen = (1<<lgln);
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DEVBUS::BUSW *buf;
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DEVBUS::BUSW *buf;
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buf = new DEVBUS::BUSW[scoplen];
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buf = new DEVBUS::BUSW[scoplen];
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if (false) {
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bool compressed = false, vector_read = true;
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DEVBUS::BUSW addrv = 0;
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if (vector_read) {
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m_fpga->readz(WBSCOPEDATA, scoplen, buf);
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m_fpga->readz(WBSCOPEDATA, scoplen, buf);
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} else {
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} else {
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for(unsigned int i=0; i<scoplen; i++)
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for(unsigned int i=0; i<scoplen; i++)
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buf[i] = m_fpga->readio(WBSCOPEDATA);
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buf[i] = m_fpga->readio(WBSCOPEDATA);
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}
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}
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for(unsigned int i=0; i<scoplen; i++) {
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if(compressed) {
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char sbuf[64];
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for(int i=0; i<(int)scoplen; i++) {
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if ((buf[i]>>31)&1) {
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if ((i>0)&&(buf[i] == buf[i-1])&&
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addrv += (buf[i]&0x7fffffff);
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(i<scoplen-1)&&(buf[i] == buf[i+1]))
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printf(" ** \n");
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continue;
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continue;
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printf("%6d %08x:", i, buf[i]);
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}
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printf("%10d %08x: ", addrv++, buf[i]);
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unsigned addr = (buf[i]>>24)&0x0ff;
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decode(buf[i]);
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zipi_to_string(m_fpga->readio(0x02000+addr),sbuf);
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printf(" %2x %-24s", (buf[i]>>24)&0x0ff, sbuf);
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printf(" %s%s%s%s%s %s%s%s",
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((buf[i]>>23)&1)?"P":" ",
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((buf[i]>>22)&1)?"D":" ",
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((buf[i]>>21)&1)?"O":" ",
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((buf[i]>>20)&1)?"A":" ",
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((buf[i]>>19)&1)?"M":" ",
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((buf[i]>>18)&1)?"o":" ",
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((buf[i]>>17)&1)?"a":" ",
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((buf[i]>>16)&1)?"m":" ");
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printf(" A=%02x ", (buf[i]>>8)&0x0ff);
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printf(" %s%02x ",
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(((buf[i]>>16)&3)!=0)?"W->":"(w)",
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(buf[i]&0x0ff));
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/*
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printf("%s", ((buf[i]>>31)&1)?"OpV":" ");
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printf("%s", ((buf[i]>>30)&1)?"opA":" ");
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printf("%s", ((buf[i]>>29)&1)?"AlV":" ");
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printf("%s", ((buf[i]>>28)&1)?"AlW":" ");
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printf("%s", ((buf[i]>>27)&1)?"opM":" ");
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printf("%s", ((buf[i]>>26)&1)?"MmV":" ");
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if (true) {
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int op = (buf[i]>>22)&0x0f;
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switch(op) {
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case 0: printf("CMP "); break;
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case 1: printf("TST "); break;
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case 2: printf("MOV "); break;
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case 3: printf("LDI "); break;
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case 4: printf("AUX "); break;
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case 5: printf("ROL "); break;
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case 6: printf("LOD "); break;
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case 7: printf("STO "); break;
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case 8: printf("SUB "); break;
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case 9: printf("AND "); break;
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case 10: printf("ADD "); break;
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case 11: printf(" OR "); break;
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case 12: printf("XOR "); break;
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case 13: printf("LSL "); break;
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case 14: printf("ASR "); break;
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case 15: printf("LSR "); break;
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default: printf("ILL "); break;
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}
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} else
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printf("%x", (buf[i]>>22)&0x0f);
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printf(" %s", ((buf[i]>>21)&1)?"W":" ");
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if ((buf[i]>>21)&1)
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printf("[%X]", ((buf[i]>>17)&0x0f));
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else
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printf("(%x)", ((buf[i]>>17)&0x0f));
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printf("D[%X]", ((buf[i]>>13)&0x0f));
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printf(" r_opA=..%02x", (buf[i]>>7)&0x3f);
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printf(" opA=..%02x", (buf[i]>>1)&0x3f);
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printf(" ALU=..%d", buf[i]&1);
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*/
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printf("\n");
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printf("\n");
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}
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}
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} else {
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for(int i=0; i<(int)scoplen; i++) {
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if ((i>0)&&(buf[i] == buf[i-1])&&(i<(int)(scoplen-1))) {
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if ((i>2)&&(buf[i] != buf[i-2]))
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printf(" **** ****\n");
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continue;
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} printf("%9d %08x: ", i, buf[i]);
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decode(buf[i]);
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printf("\n");
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}
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}
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if (m_fpga->poll()) {
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if (m_fpga->poll()) {
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printf("FPGA was interrupted\n");
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printf("FPGA was interrupted\n");
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m_fpga->clear();
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m_fpga->clear();
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m_fpga->writeio(R_ICONTROL, SCOPEN);
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m_fpga->writeio(R_ICONTROL, SCOPEN);
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}
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}
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delete[] buf;
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delete m_fpga;
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delete m_fpga;
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}
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}
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No newline at end of file
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No newline at end of file
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