URL https://opencores.org/ocsvn/xulalx25soc/xulalx25soc/trunk

Subversion Repositories xulalx25soc

[/] [xulalx25soc/] [trunk/] [sw/] [ramscope.cpp] - Diff between revs 5 and 42

Rev 5	Rev 42
Line 3...	Line 3...
`// Filename: ramscope.cpp`	`// Filename: ramscope.cpp`
`//`	`//`
`// Project: XuLA2 board`	`// Project: XuLA2 board`
`//`	`//`
`// Purpose: To read out, and decompose, the results of the wishbone scope`	`// Purpose: To read out, and decompose, the results of the wishbone scope`
`// as applied to the ICAPE2 interaction.`	`// as applied to the SDRAM interaction.`
`//`	`//`
`//`	`//`
`// Creator: Dan Gisselquist, Ph.D.`	`// Creator: Dan Gisselquist, Ph.D.`
`// Gisselquist Technology, LLC`	`// Gisselquist Technology, LLC`
`//`	`//`
Line 121...	Line 121...
`skipping = true;`	`skipping = true;`
`continue;`	`continue;`
`} skipping = false;`	`} skipping = false;`
`printf("%6d %08x:", i, buf[i]);`	`printf("%6d %08x:", i, buf[i]);`
`printf("S(%x) ", (buf[i]>>27)&0x0f);`	`printf("S(%x) ", (buf[i]>>27)&0x0f);`
`if (buf[i] & 0x40000000)`	`if (buf[i] & 0x20000000)`
`printf("W "); else printf("R ");`	`printf("W "); else printf("R ");`
`printf("WB(%s%s%s%s%s",`	`printf("WB(%s%s%s%s%s",`
`(buf[i]&0x80000000)?"CYC":" ",`	`(buf[i]&0x80000000)?"CYC":" ",`
`(buf[i]&0x40000000)?"STB":" ",`	`(buf[i]&0x40000000)?"STB":" ",`
`(buf[i]&0x20000000)?"WE":" ",`	`(buf[i]&0x20000000)?"WE":" ",`