URL
https://opencores.org/ocsvn/xulalx25soc/xulalx25soc/trunk
[/] [xulalx25soc/] [trunk/] [sw/] [regdefs.h] - Diff between revs 5 and 11
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
Rev 5 |
Rev 11 |
Line 129... |
Line 129... |
#define FLASHWORDS (1<<18)
|
#define FLASHWORDS (1<<18)
|
// SDRAM memory space
|
// SDRAM memory space
|
#define SDRAMBASE 0x00800000
|
#define SDRAMBASE 0x00800000
|
// Zip CPU Control and Debug registers
|
// Zip CPU Control and Debug registers
|
#define R_ZIPCTRL 0x01000000
|
#define R_ZIPCTRL 0x01000000
|
#define R_ZIPDATA 0x01100001
|
#define R_ZIPDATA 0x01000001
|
|
|
|
|
// Interrupt control constants
|
// Interrupt control constants
|
#define GIE 0x80000000 // Enable all interrupts
|
#define GIE 0x80000000 // Enable all interrupts
|
#define ISPIF_EN 0x80040004 // Enable all, enable SPI, clear SPI
|
|
#define ISPIF_DIS 0x00040000 // Disable all, disable SPI
|
|
#define ISPIF_CLR 0x00000004 // Clear SPI interrupt
|
|
#define SCOPEN 0x80080008 // Enable WBSCOPE interrupts
|
|
|
|
// Flash control constants
|
// Flash control constants
|
#define ERASEFLAG 0x80000000
|
#define ERASEFLAG 0x80000000
|
#define DISABLEWP 0x10000000
|
#define DISABLEWP 0x10000000
|
|
|
© copyright 1999-2025
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.