OpenCores
URL https://opencores.org/ocsvn/xulalx25soc/xulalx25soc/trunk

Subversion Repositories xulalx25soc

[/] [xulalx25soc/] [trunk/] [sw/] [zipdbg.cpp] - Diff between revs 76 and 92

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 76 Rev 92
Line 367... Line 367...
                showval(ln,40, "TMRC", m_state.m_p[6], (m_cursor==6));
                showval(ln,40, "TMRC", m_state.m_p[6], (m_cursor==6));
                showval(ln,60, "JIF ", m_state.m_p[7], (m_cursor==7));
                showval(ln,60, "JIF ", m_state.m_p[7], (m_cursor==7));
 
 
                ln++;
                ln++;
                if (!m_show_users_timers) {
                if (!m_show_users_timers) {
                        showval(ln, 0, "MTSK", m_state.m_p[12], (m_cursor==8));
                        showval(ln, 0, "MTSK", m_state.m_p[ 8], (m_cursor==8));
                        showval(ln,20, "MOST", m_state.m_p[13], (m_cursor==9));
                        showval(ln,20, "MOST", m_state.m_p[ 9], (m_cursor==9));
                        showval(ln,40, "MPST", m_state.m_p[14], (m_cursor==10));
                        showval(ln,40, "MPST", m_state.m_p[10], (m_cursor==10));
                        showval(ln,60, "MICT", m_state.m_p[15], (m_cursor==11));
                        showval(ln,60, "MICT", m_state.m_p[11], (m_cursor==11));
                } else {
                } else {
                        showval(ln, 0, "UTSK", m_state.m_p[ 8], (m_cursor==8));
                        showval(ln, 0, "UTSK", m_state.m_p[12], (m_cursor==8));
                        showval(ln,20, "UMST", m_state.m_p[ 9], (m_cursor==9));
                        showval(ln,20, "UMST", m_state.m_p[13], (m_cursor==9));
                        showval(ln,40, "UPST", m_state.m_p[10], (m_cursor==10));
                        showval(ln,40, "UPST", m_state.m_p[14], (m_cursor==10));
                        showval(ln,60, "UICT", m_state.m_p[11], (m_cursor==11));
                        showval(ln,60, "UICT", m_state.m_p[15], (m_cursor==11));
                }
                }
 
 
                ln++;
                ln++;
                ln++;
                ln++;
                unsigned int cc = m_state.m_sR[14];
                unsigned int cc = m_state.m_sR[14];

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.