Line 270... |
Line 270... |
}
|
}
|
|
|
total_octets += phdr.p_memsz;
|
total_octets += phdr.p_memsz;
|
}
|
}
|
|
|
char *d = (char *)malloc(total_octets);
|
char *d = (char *)malloc(total_octets + sizeof(SECTION)+sizeof(SECTION *));
|
memset(d, 0, total_octets);
|
memset(d, 0, total_octets);
|
|
|
SECTION **r = sections = (SECTION **)d;
|
SECTION **r = sections = (SECTION **)d;
|
current_offset = (n+1)*sizeof(SECTION *);
|
current_offset = (n+1)*sizeof(SECTION *);
|
current_section = 0;
|
current_section = 0;
|
Line 330... |
Line 330... |
if (dbg) for(unsigned j=0; j<r[i]->m_len; j++)
|
if (dbg) for(unsigned j=0; j<r[i]->m_len; j++)
|
fprintf(stderr, "ADR[%04x] = %08x\n", r[i]->m_start+j,
|
fprintf(stderr, "ADR[%04x] = %08x\n", r[i]->m_start+j,
|
r[i]->m_data[j]);
|
r[i]->m_data[j]);
|
}
|
}
|
|
|
|
r[i] = (SECTION *)(&d[current_offset]);
|
r[current_section]->m_start = 0;
|
r[current_section]->m_start = 0;
|
r[current_section]->m_len = 0;
|
r[current_section]->m_len = 0;
|
|
|
elf_end(e);
|
elf_end(e);
|
close(fd);
|
close(fd);
|
Line 421... |
Line 422... |
if(iself(codef)) {
|
if(iself(codef)) {
|
#ifndef CHEAP_AND_EASY
|
#ifndef CHEAP_AND_EASY
|
// zip-readelf will help with both of these ...
|
// zip-readelf will help with both of these ...
|
elfread(codef, entry, secpp);
|
elfread(codef, entry, secpp);
|
|
|
fprintf(stderr, "Secpp = %08lx\n", (unsigned long)secpp);
|
/*
|
for(int i=0; secpp[i]->m_len; i++) {
|
fprintf(stderr, "Secpp = %08lx\n", (unsigned long)secpp);
|
secp = secpp[i];
|
for(int i=0; secpp[i]->m_len; i++) {
|
fprintf(stderr, "Sec[%2d] - %08x - %08x\n",
|
secp = secpp[i];
|
i, secp->m_start,
|
fprintf(stderr, "Sec[%2d] - %08x - %08x\n",
|
secp->m_start+secp->m_len);
|
i, secp->m_start,
|
}
|
secp->m_start+secp->m_len);
|
|
} */
|
#else
|
#else
|
char tmpbuf[TMP_MAX], cmdbuf[256];
|
char tmpbuf[TMP_MAX], cmdbuf[256];
|
int unused_fd;
|
int unused_fd;
|
|
|
strcpy(tmpbuf, "/var/tmp/ziprunXXXX");
|
strcpy(tmpbuf, "/var/tmp/ziprunXXXX");
|
Line 481... |
Line 483... |
if (clear_memory) for(int i=0; secpp[i]->m_len; i++) {
|
if (clear_memory) for(int i=0; secpp[i]->m_len; i++) {
|
secp = secpp[i];
|
secp = secpp[i];
|
if ((secp->m_start >= RAMBASE)
|
if ((secp->m_start >= RAMBASE)
|
&&(secp->m_start+secp->m_len
|
&&(secp->m_start+secp->m_len
|
<= RAMBASE+MEMWORDS)) {
|
<= RAMBASE+MEMWORDS)) {
|
|
printf("Clearing Block ram\n");
|
FPGA::BUSW zbuf[128], a;
|
FPGA::BUSW zbuf[128], a;
|
memset(zbuf, 0, 128*sizeof(FPGA::BUSW));
|
memset(zbuf, 0, 128*sizeof(FPGA::BUSW));
|
for(a=RAMBASE; a<RAMBASE+MEMWORDS; a+=128)
|
for(a=RAMBASE; a<RAMBASE+MEMWORDS; a+=128)
|
m_fpga->writei(a, 128, zbuf);
|
m_fpga->writei(a, 128, zbuf);
|
break;
|
break;
|
}
|
}
|
}
|
} m_fpga->readio(R_VERSION); // Check for buserrors
|
|
|
if (clear_memory) for(int i=0; secpp[i]->m_len; i++) {
|
if (clear_memory) for(int i=0; secpp[i]->m_len; i++) {
|
secp = secpp[i];
|
secp = secpp[i];
|
if ((secp->m_start >= SDRAMBASE)
|
if ((secp->m_start >= SDRAMBASE)
|
&&(secp->m_start+secp->m_len
|
&&(secp->m_start+secp->m_len
|
<= SDRAMBASE+SDRAMWORDS)) {
|
<= SDRAMBASE+SDRAMWORDS)) {
|
FPGA::BUSW zbuf[128], a;
|
FPGA::BUSW zbuf[128], a;
|
|
printf("Clearing SDRam\n");
|
memset(zbuf, 0, 128*sizeof(FPGA::BUSW));
|
memset(zbuf, 0, 128*sizeof(FPGA::BUSW));
|
for(a=SDRAMBASE; a<SDRAMBASE+SDRAMWORDS; a+=128)
|
for(a=SDRAMBASE; a<SDRAMBASE+SDRAMWORDS; a+=128)
|
m_fpga->writei(a, 128, zbuf);
|
m_fpga->writei(a, 128, zbuf);
|
break;
|
break;
|
}
|
}
|
}
|
} m_fpga->readio(R_VERSION); // Check for buserrors
|
|
|
for(int i=0; secpp[i]->m_len; i++) {
|
for(int i=0; secpp[i]->m_len; i++) {
|
bool inflash=false;
|
bool inflash=false;
|
|
|
secp = secpp[i];
|
secp = secpp[i];
|
Line 517... |
Line 521... |
flash = new FLASHDRVR(m_fpga);
|
flash = new FLASHDRVR(m_fpga);
|
flash->write(secp->m_start, secp->m_len, secp->m_data, true);
|
flash->write(secp->m_start, secp->m_len, secp->m_data, true);
|
} else
|
} else
|
m_fpga->writei(secp->m_start, secp->m_len, secp->m_data);
|
m_fpga->writei(secp->m_start, secp->m_len, secp->m_data);
|
}
|
}
|
m_fpga->readio(R_ZIPCTRL);
|
m_fpga->readio(R_ZIPCTRL); // Check for bus errors
|
|
|
// Clear any buffers
|
// Clear any buffers
|
printf("Clearing the cache\n");
|
printf("Clearing the cache\n");
|
m_fpga->writeio(R_ZIPCTRL, CPU_RESET|CPU_HALT|CPU_CLRCACHE);
|
m_fpga->writeio(R_ZIPCTRL, CPU_RESET|CPU_HALT|CPU_CLRCACHE);
|
|
m_fpga->readio(R_VERSION);
|
|
|
if (clear_registers) {
|
if (clear_registers) {
|
printf("Clearing all registers to zero\n");
|
printf("Clearing all registers to zero\n");
|
// Clear all registers to zero
|
// Clear all registers to zero
|
for(int i=0; i<32; i++) {
|
for(int i=0; i<32; i++) {
|
m_fpga->writeio(R_ZIPCTRL, CPU_HALT|i);
|
m_fpga->writeio(R_ZIPCTRL, CPU_HALT|i);
|
m_fpga->writeio(R_ZIPDATA, 0);
|
m_fpga->writeio(R_ZIPDATA, 0);
|
}
|
}
|
}
|
} m_fpga->readio(R_VERSION); // Check for bus errors
|
|
|
// Start in interrupt mode
|
// Start in interrupt mode
|
m_fpga->writeio(R_ZIPCTRL, CPU_HALT|CPU_sCC);
|
m_fpga->writeio(R_ZIPCTRL, CPU_HALT|CPU_sCC);
|
m_fpga->writeio(R_ZIPDATA, 0x000);
|
m_fpga->writeio(R_ZIPDATA, 0x000);
|
|
|
// Set our entry point into our code
|
// Set our entry point into our code
|
m_fpga->writeio(R_ZIPCTRL, CPU_HALT|CPU_sPC);
|
m_fpga->writeio(R_ZIPCTRL, CPU_HALT|CPU_sPC);
|
m_fpga->writeio(R_ZIPDATA, entry);
|
m_fpga->writeio(R_ZIPDATA, entry);
|
|
|
|
printf("The CPU should be fully loaded, you may now start\n");
|
|
printf("it. To start the CPU, type wbregs cpu 0\n");
|
} catch(BUSERR a) {
|
} catch(BUSERR a) {
|
fprintf(stderr, "XULA-BUS error\n");
|
fprintf(stderr, "XULA-BUS error\n");
|
m_fpga->writeio(R_ZIPCTRL, CPU_RESET|CPU_HALT|CPU_CLRCACHE);
|
m_fpga->writeio(R_ZIPCTRL, CPU_RESET|CPU_HALT|CPU_CLRCACHE);
|
exit(-2);
|
exit(-2);
|
}
|
}
|