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/*******************************************************************************************/
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/*******************************************************************************************/
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/** **/
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/** **/
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/** COPYRIGHT (C) 2011, SYSTEMYDE INTERNATIONAL CORPORATION, ALL RIGHTS RESERVED **/
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/** ORIGINAL COPYRIGHT (C) 2011, SYSTEMYDE INTERNATIONAL CORPORATION, ALL RIGHTS RESERVED **/
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/** COPYRIGHT (C) 2012, SERGEY BELYASHOV **/
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/** **/
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/** **/
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/** processor top level Rev 0.0 08/03/2011 **/
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/** processor top level Rev 0.0 06/13/2012 **/
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/** **/
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/** **/
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/*******************************************************************************************/
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/*******************************************************************************************/
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module y80_top (dma_ack, halt_tran, iack_tran, io_addr_out, io_data_out, io_read, io_strobe,
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module y80_top (dma_ack, halt_tran, iack_tran, io_addr_out, io_data_out, io_read, io_strobe,
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io_tran, ivec_rd, mem_addr_out, mem_data_out, mem_rd, mem_tran, mem_wr,
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io_tran, ivec_rd, mem_addr_out, mem_data_out, mem_rd, mem_tran, mem_wr,
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reti_tran, t1, clearb, clkc, dma_req, int_req, io_data_in, ivec_data_in,
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reti_tran, t1, clearb, clkc, dma_req, int_req, io_data_in, ivec_data_in,
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.state_nxt(state_nxt), .tflg_ctl(tflg_ctl), .tran_sel(tran_sel),
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.state_nxt(state_nxt), .tflg_ctl(tflg_ctl), .tran_sel(tran_sel),
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.wr_addr(wr_addr), .wr_frst(wr_frst), .zflg_en(zflg_en),
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.wr_addr(wr_addr), .wr_frst(wr_frst), .zflg_en(zflg_en),
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.carry_bit(carry_bit), .dmar_reg(dmar_reg), .inst_reg(inst_reg),
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.carry_bit(carry_bit), .dmar_reg(dmar_reg), .inst_reg(inst_reg),
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.intr_reg(intr_reg), .page_reg(page_reg), .par_bit(par_bit),
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.intr_reg(intr_reg), .page_reg(page_reg), .par_bit(par_bit),
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.sign_bit(sign_bit), .state_reg(state_reg), .tflg_reg(tflg_reg),
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.sign_bit(sign_bit), .state_reg(state_reg), .tflg_reg(tflg_reg),
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.vector_int(vector_int), .xhlt_reg(xhlt_reg), .zero_bit(zero_bit) );
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.vector_int(vector_int), .xhlt_reg(xhlt_reg), .zero_bit(zero_bit),
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.int_req(int_req) );
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/*****************************************************************************************/
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/*****************************************************************************************/
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/* */
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/* */
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/* data path module */
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/* data path module */
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/* */
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/* */
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