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/*
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* Copyright (c) 2008 Zeus Gomez Marmolejo <zeus@opencores.org>
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*
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* This file is part of the Zet processor. This processor is free
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* hardware; you can redistribute it and/or modify it under the terms of
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* the GNU General Public License as published by the Free Software
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* Foundation; either version 3, or (at your option) any later version.
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*
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* Zet is distrubuted in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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* License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with Zet; see the file COPYING. If not, see
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* <http://www.gnu.org/licenses/>.
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*/
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`timescale 1ns/10ps
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module jmp_cond (
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input [4:0] logic_flags,
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input [3:0] cond,
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input is_cx,
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input [15:0] cx,
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output reg jmp
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);
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// Net declarations
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wire of, sf, zf, pf, cf;
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wire cx_zero;
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// Assignments
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assign of = logic_flags[4];
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assign sf = logic_flags[3];
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assign zf = logic_flags[2];
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assign pf = logic_flags[1];
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assign cf = logic_flags[0];
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assign cx_zero = ~(|cx);
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// Behaviour
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always @(cond or is_cx or cx_zero or zf or of or cf or sf or pf)
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if (is_cx) case (cond)
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4'b0000: jmp <= cx_zero; /* jcxz */
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4'b0001: jmp <= ~cx_zero; /* loop */
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4'b0010: jmp <= zf & ~cx_zero; /* loopz */
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default: jmp <= ~zf & ~cx_zero; /* loopnz */
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endcase
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else case (cond)
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4'b0000: jmp <= of;
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4'b0001: jmp <= ~of;
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4'b0010: jmp <= cf;
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4'b0011: jmp <= ~cf;
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4'b0100: jmp <= zf;
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4'b0101: jmp <= ~zf;
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4'b0110: jmp <= cf | zf;
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4'b0111: jmp <= ~cf & ~zf;
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4'b1000: jmp <= sf;
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4'b1001: jmp <= ~sf;
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4'b1010: jmp <= pf;
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4'b1011: jmp <= ~pf;
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4'b1100: jmp <= (sf ^ of);
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4'b1101: jmp <= (sf ^~ of);
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4'b1110: jmp <= zf | (sf ^ of);
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4'b1111: jmp <= ~zf & (sf ^~ of);
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endcase
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endmodule
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