URL
https://opencores.org/ocsvn/zet86/zet86/trunk
[/] [zet86/] [trunk/] [sim/] [memory.v] - Diff between revs 24 and 26
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
| Rev 24 |
Rev 26 |
| Line 22... |
Line 22... |
// Behaviour
|
// Behaviour
|
always @(posedge clk)
|
always @(posedge clk)
|
if (we) if (byte_m) ram[addr] <= wr_data[7:0];
|
if (we) if (byte_m) ram[addr] <= wr_data[7:0];
|
else { ram[addr1], ram[addr] } <= wr_data;
|
else { ram[addr1], ram[addr] } <= wr_data;
|
|
|
initial $readmemh("/home/zeus/zet/sim/12_rotate.rtlrom", ram, 20'hf0000);
|
initial $readmemh("/home/zeus/zet/sim/13_bcdcnv.rtlrom", ram, 20'hf0000);
|
endmodule
|
endmodule
|
|
|
No newline at end of file
|
No newline at end of file
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.
