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* You should have received a copy of the GNU General Public License
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* You should have received a copy of the GNU General Public License
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* along with Zet; see the file COPYING. If not, see
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* along with Zet; see the file COPYING. If not, see
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* <http://www.gnu.org/licenses/>.
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* <http://www.gnu.org/licenses/>.
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*/
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*/
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`include "defines.v"
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`timescale 1ns/100ps
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`timescale 1ns/100ps
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`define TOTAL_BITS 11
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`define TOTAL_BITS 11
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`define RELEASE_CODE 16'hF0
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`define RELEASE_CODE 16'hF0
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`define LEFT_SHIFT 16'h12
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`define LEFT_SHIFT 16'h12
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`define RIGHT_SHIFT 16'h59
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`define RIGHT_SHIFT 16'h59
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module ps2_keyb (
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module ps2_keyb (
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`ifdef DEBUG
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output rx_output_strobe,
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output released,
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output rx_shifting_done,
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`endif
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// Wishbone slave interface
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// Wishbone slave interface
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input wb_clk_i,
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input wb_clk_i,
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input wb_rst_i,
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input wb_rst_i,
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output reg [7:0] wb_dat_o, // scancode
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output reg [7:0] wb_dat_o, // scancode
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output reg wb_tgc_o, // intr
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output reg wb_tgc_o, // intr
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input wb_tgc_i, // inta
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// PS2 PAD signals
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// PS2 PAD signals
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inout ps2_clk_,
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inout ps2_clk_,
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inout ps2_data_
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inout ps2_data_
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);
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);
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parameter m1_tx_error_no_keyboard_ack = 8;
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parameter m1_tx_error_no_keyboard_ack = 8;
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parameter m1_tx_rising_edge_marker = 9;
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parameter m1_tx_rising_edge_marker = 9;
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// Nets and registers
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// Nets and registers
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wire rx_output_event;
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wire rx_output_event;
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wire rx_output_strobe;
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wire rx_shifting_done;
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wire tx_shifting_done;
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wire tx_shifting_done;
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wire timer_60usec_done;
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wire timer_60usec_done;
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wire timer_5usec_done;
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wire timer_5usec_done;
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`ifndef DEBUG
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wire rx_output_strobe;
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wire rx_shifting_done;
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wire released;
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wire released;
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`endif
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wire [6:0] xt_code;
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wire [6:0] xt_code;
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reg [3:0] bit_count;
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reg [3:0] bit_count;
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reg [3:0] m1_state;
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reg [3:0] m1_state;
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reg [3:0] m1_next_state;
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reg [3:0] m1_next_state;
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// These are the "unlatched versions."
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// These are the "unlatched versions."
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//assign extended = (q[8:1] == `EXTEND_CODE) && rx_shifting_done;
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//assign extended = (q[8:1] == `EXTEND_CODE) && rx_shifting_done;
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assign released = (q[8:1] == `RELEASE_CODE) && rx_shifting_done;
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assign released = (q[8:1] == `RELEASE_CODE) && rx_shifting_done;
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// Behaviour
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// Behaviour
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// intr
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// wb_tgc_o
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always @(posedge wb_clk_i)
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always @(posedge wb_clk_i)
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wb_tgc_o <= wb_rst_i ? 1'b0
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wb_tgc_o <= wb_rst_i ? 1'b0 : rx_output_strobe;
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: ((rx_output_strobe & !wb_tgc_i) ? 1'b1
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: (wb_tgc_o ? !wb_tgc_i : 1'b0));
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// This is the shift register
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// This is the shift register
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always @(posedge wb_clk_i)
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always @(posedge wb_clk_i)
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if (wb_rst_i) q <= 0;
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if (wb_rst_i) q <= 0;
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// else if (((m1_state == m1_rx_clk_h) && ~ps2_clk_s)
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// else if (((m1_state == m1_rx_clk_h) && ~ps2_clk_s)
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