URL https://opencores.org/ocsvn/zet86/zet86/trunk

Subversion Repositories zet86

[/] [zet86/] [trunk/] [soc/] [vga/] [sim/] [tb.do] - Diff between revs 39 and 40

Rev 39	Rev 40
Line 1...	Line 1...
`vdel -all -lib work`	`#vdel -all -lib work`
`vmap unisims /opt/Xilinx/10.1/modelsim/verilog/unisims`	`vmap unisims /opt/Xilinx/10.1/modelsim/verilog/unisims`
`vlib work`	`vlib work`
`vlog -work work -lint vdu.v vdu_tb.v ram2k_b16_attr.v ram2k_b16.v char_rom_b16.v`	`vlog -work work -lint ../rtl/vdu.v vdu_tb.v ../rtl/ram2k_b16_attr.v ../rtl/ram2k_b16.v ../rtl/char_rom_b16.v`
`vlog -work work /opt/Xilinx/10.1/ISE/verilog/src/glbl.v`	`vlog -work work /opt/Xilinx/10.1/ISE/verilog/src/glbl.v`
`vsim -L /opt/Xilinx/10.1/modelsim/verilog/unisims -novopt -t ns work.vdu_tb work.glbl`	`vsim -L /opt/Xilinx/10.1/modelsim/verilog/unisims -novopt -t ns work.vdu_tb work.glbl`
`add wave -radix hexadecimal /vdu_tb/vdu0/*`	`add wave -radix hexadecimal /vdu_tb/vdu0/*`