Line 71... |
Line 71... |
class ZIPPY_TB : public TESTB<Vzipsystem> {
|
class ZIPPY_TB : public TESTB<Vzipsystem> {
|
public:
|
public:
|
unsigned long m_mem_size;
|
unsigned long m_mem_size;
|
MEMSIM m_mem;
|
MEMSIM m_mem;
|
// QSPIFLASHSIM m_flash;
|
// QSPIFLASHSIM m_flash;
|
FILE *dbg_fp;
|
FILE *dbg_fp, *m_profile_fp;
|
bool dbg_flag, bomb, m_show_user_timers;
|
bool dbg_flag, bomb, m_show_user_timers;
|
int m_cursor;
|
int m_cursor;
|
|
unsigned long m_last_instruction_tickcount;
|
|
|
ZIPPY_TB(void) : m_mem_size(1<<20), m_mem(m_mem_size) {
|
ZIPPY_TB(void) : m_mem_size(1<<20), m_mem(m_mem_size) {
|
if (false) {
|
if (false) {
|
dbg_fp = fopen("dbg.txt", "w");
|
dbg_fp = fopen("dbg.txt", "w");
|
dbg_flag = true;
|
dbg_flag = true;
|
Line 86... |
Line 87... |
dbg_flag = false;
|
dbg_flag = false;
|
}
|
}
|
bomb = false;
|
bomb = false;
|
m_cursor = 0;
|
m_cursor = 0;
|
m_show_user_timers = false;
|
m_show_user_timers = false;
|
|
|
|
m_last_instruction_tickcount = 0l;
|
|
if (true) {
|
|
m_profile_fp = fopen("pfile.bin","wb");
|
|
} else {
|
|
m_profile_fp = NULL;
|
|
}
|
}
|
}
|
|
|
void reset(void) {
|
void reset(void) {
|
// m_flash.debug(false);
|
// m_flash.debug(false);
|
TESTB<Vzipsystem>::reset();
|
TESTB<Vzipsystem>::reset();
|
Line 391... |
Line 399... |
(m_core->v__DOT__thecpu__DOT__mem_ce),
|
(m_core->v__DOT__thecpu__DOT__mem_ce),
|
(m_core->v__DOT__thecpu__DOT__master_ce), //1
|
(m_core->v__DOT__thecpu__DOT__master_ce), //1
|
(m_core->v__DOT__thecpu__DOT__opvalid_mem), //0
|
(m_core->v__DOT__thecpu__DOT__opvalid_mem), //0
|
(!m_core->v__DOT__thecpu__DOT__clear_pipeline), //1
|
(!m_core->v__DOT__thecpu__DOT__clear_pipeline), //1
|
(m_core->v__DOT__thecpu__DOT__set_cond), //1
|
(m_core->v__DOT__thecpu__DOT__set_cond), //1
|
(!m_core->v__DOT__thecpu__DOT__mem_stalled), //1
|
(!mem_stalled()), //1
|
|
|
(m_core->v__DOT__thecpu__DOT__mem_stalled),
|
(mem_stalled()),
|
(m_core->v__DOT__thecpu__DOT__opvalid_mem),
|
(m_core->v__DOT__thecpu__DOT__opvalid_mem),
|
(m_core->v__DOT__thecpu__DOT__master_ce),
|
(m_core->v__DOT__thecpu__DOT__master_ce),
|
(mem_pipe_stalled()),
|
(mem_pipe_stalled()),
|
(!m_core->v__DOT__thecpu__DOT__op_pipe),
|
(!m_core->v__DOT__thecpu__DOT__op_pipe),
|
#ifdef OPT_PIPELINED_BUS_ACCESS
|
#ifdef OPT_PIPELINED_BUS_ACCESS
|
Line 481... |
Line 489... |
mvprintw(ln-1,10,"W");
|
mvprintw(ln-1,10,"W");
|
else if (m_core->v__DOT__thecpu__DOT__alu_valid)
|
else if (m_core->v__DOT__thecpu__DOT__alu_valid)
|
mvprintw(ln-1,10,(m_core->v__DOT__thecpu__DOT__alu_wr)?"w":"V");
|
mvprintw(ln-1,10,(m_core->v__DOT__thecpu__DOT__alu_wr)?"w":"V");
|
else if (m_core->v__DOT__thecpu__DOT__mem_valid)
|
else if (m_core->v__DOT__thecpu__DOT__mem_valid)
|
mvprintw(ln-1,10,"v");
|
mvprintw(ln-1,10,"v");
|
|
#ifdef OPT_ILLEGAL_INSTRUCTION
|
else if (m_core->v__DOT__thecpu__DOT__r_alu_illegal)
|
else if (m_core->v__DOT__thecpu__DOT__r_alu_illegal)
|
mvprintw(ln-1,10,"I");
|
mvprintw(ln-1,10,"I");
|
|
#endif
|
// else if (m_core->v__DOT__thecpu__DOT__alu_illegal_op)
|
// else if (m_core->v__DOT__thecpu__DOT__alu_illegal_op)
|
// mvprintw(ln-1,10,"i");
|
// mvprintw(ln-1,10,"i");
|
|
|
mvprintw(ln-5, 65,"%s %s",
|
mvprintw(ln-5, 65,"%s %s",
|
(m_core->v__DOT__thecpu__DOT__op_break)?"OB":" ",
|
(m_core->v__DOT__thecpu__DOT__op_break)?"OB":" ",
|
Line 521... |
Line 531... |
printw("%8s","");
|
printw("%8s","");
|
mvprintw(ln-1, 48, "MEM: %s%s %s%s %s %-5s",
|
mvprintw(ln-1, 48, "MEM: %s%s %s%s %s %-5s",
|
(m_core->v__DOT__thecpu__DOT__opvalid_mem)?"M":" ",
|
(m_core->v__DOT__thecpu__DOT__opvalid_mem)?"M":" ",
|
(m_core->v__DOT__thecpu__DOT__mem_ce)?"CE":" ",
|
(m_core->v__DOT__thecpu__DOT__mem_ce)?"CE":" ",
|
(m_core->v__DOT__thecpu__DOT__mem_we)?"Wr ":"Rd ",
|
(m_core->v__DOT__thecpu__DOT__mem_we)?"Wr ":"Rd ",
|
(m_core->v__DOT__thecpu__DOT__mem_stalled)?"PIPE":" ",
|
(mem_stalled())?"PIPE":" ",
|
(m_core->v__DOT__thecpu__DOT__mem_valid)?"V":" ",
|
(m_core->v__DOT__thecpu__DOT__mem_valid)?"V":" ",
|
zop_regstr[(m_core->v__DOT__thecpu__DOT__mem_wreg&0x1f)^0x10]);
|
zop_regstr[(m_core->v__DOT__thecpu__DOT__mem_wreg&0x1f)^0x10]);
|
}
|
}
|
|
|
void show_user_timers(bool v) {
|
void show_user_timers(bool v) {
|
Line 934... |
Line 944... |
m_core->v__DOT__thecpu__DOT__alu_gie,
|
m_core->v__DOT__thecpu__DOT__alu_gie,
|
m_core->v__DOT__thecpu__DOT__alu_stall,
|
m_core->v__DOT__thecpu__DOT__alu_stall,
|
alu_pc());
|
alu_pc());
|
|
|
}
|
}
|
|
|
|
if ((m_core->v__DOT__thecpu__DOT__alu_pc_valid)
|
|
&&(!m_core->v__DOT__thecpu__DOT__clear_pipeline)) {
|
|
unsigned long iticks = m_tickcount - m_last_instruction_tickcount;
|
|
if (m_profile_fp) {
|
|
unsigned buf[2];
|
|
buf[0] = m_core->v__DOT__thecpu__DOT__alu_pc-1;
|
|
buf[1] = iticks;
|
|
fwrite(buf, sizeof(unsigned), 2, m_profile_fp);
|
|
}
|
|
m_last_instruction_tickcount = m_tickcount;
|
|
}
|
}
|
}
|
|
|
bool test_success(void) {
|
bool test_success(void) {
|
return ((!m_core->v__DOT__thecpu__DOT__gie)
|
return ((!m_core->v__DOT__thecpu__DOT__gie)
|
&&(m_core->v__DOT__thecpu__DOT__sleep));
|
&&(m_core->v__DOT__thecpu__DOT__sleep));
|
Line 951... |
Line 973... |
return r;
|
return r;
|
*/
|
*/
|
return m_core->v__DOT__thecpu__DOT__op_pc-1;
|
return m_core->v__DOT__thecpu__DOT__op_pc-1;
|
}
|
}
|
|
|
|
bool mem_busy(void) {
|
|
// return m_core->v__DOT__thecpu__DOT__mem_busy;
|
|
return m_core->v__DOT__thecpu__DOT__domem__DOT__cyc;
|
|
}
|
|
|
|
bool mem_stalled(void) {
|
|
bool a, b, c, d, wr_write_cc, wr_write_pc, op_gie;
|
|
|
|
wr_write_cc=((m_core->v__DOT__thecpu__DOT__wr_reg_id&0x0f)==0x0e);
|
|
wr_write_pc=((m_core->v__DOT__thecpu__DOT__wr_reg_id&0x0f)==0x0f);
|
|
op_gie = m_core->v__DOT__thecpu__DOT__op_gie;
|
|
|
|
a = m_core->v__DOT__thecpu__DOT__mem_pipe_stalled;
|
|
b = (m_core->v__DOT__thecpu__DOT__op_pipe)&&(mem_busy());
|
|
d = ((wr_write_pc)||(wr_write_cc));
|
|
c = ((m_core->v__DOT__thecpu__DOT__wr_reg_ce)
|
|
&&((m_core->v__DOT__thecpu__DOT__wr_reg_id&0x010)==op_gie)
|
|
&&d);
|
|
d =(m_core->v__DOT__thecpu__DOT__opvalid_mem)&&((a)||(b)||(c));
|
|
return ((!m_core->v__DOT__thecpu__DOT__master_ce)||(d));
|
|
}
|
|
|
unsigned alu_pc(void) {
|
unsigned alu_pc(void) {
|
/*
|
/*
|
unsigned r = op_pc();
|
unsigned r = op_pc();
|
if (m_core->v__DOT__thecpu__DOT__opvalid)
|
if (m_core->v__DOT__thecpu__DOT__opvalid)
|
r--;
|
r--;
|
Line 1250... |
Line 1294... |
exit(-1);
|
exit(-1);
|
break;
|
break;
|
}
|
}
|
} else if (access(argv[argn], R_OK)==0) {
|
} else if (access(argv[argn], R_OK)==0) {
|
FILE *fp = fopen(argv[argn], "r");
|
FILE *fp = fopen(argv[argn], "r");
|
|
int nr, nv = 0;
|
if (fp == NULL) {
|
if (fp == NULL) {
|
printf("Cannot open %s\n", argv[argn]);
|
printf("Cannot open %s\n", argv[argn]);
|
perror("O/S Err: ");
|
perror("O/S Err: ");
|
exit(-1);
|
exit(-1);
|
} mptr += fread(&tb->m_mem[mptr], sizeof(ZIPI), tb->m_mem_size - mptr, fp);
|
} nr = fread(&tb->m_mem[mptr], sizeof(ZIPI), tb->m_mem_size - mptr, fp);
|
fclose(fp);
|
fclose(fp);
|
|
mptr+= nr;
|
|
if (nr == 0) {
|
|
printf("Could not read from %s, only read 0 words\n", argv[argn]);
|
|
perror("O/S Err?:");
|
|
exit(-2);
|
|
} for(int i=0; i<nr; i++) {
|
|
if (tb->m_mem[mptr-nr+i])
|
|
nv++;
|
|
} if (nv == 0) {
|
|
printf("Read nothing but zeros from %s\n", argv[argn]);
|
|
perror("O/S Err?:");
|
|
exit(-2);
|
|
}
|
|
} else {
|
|
fprintf(stderr, "No access to %s, or unknown arg\n", argv[argn]);
|
|
exit(-2);
|
}
|
}
|
}
|
}
|
}
|
}
|
|
|
|
|
|
assert(mptr > 0);
|
|
|
if (autorun) {
|
if (autorun) {
|
bool done = false;
|
bool done = false;
|
|
|
printf("Running in non-interactive mode\n");
|
printf("Running in non-interactive mode\n");
|
tb->reset();
|
tb->reset();
|