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################################################################################
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################################################################################
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#
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##
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# Filename: Makefile
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## Filename: Makefile
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#
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##
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# Project: Zip CPU -- a small, lightweight, RISC CPU soft core
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## Project: Zip CPU -- a small, lightweight, RISC CPU soft core
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#
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##
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# Purpose: This makefile builds a verilator simulation of the zipsystem.
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## Purpose: This makefile builds a verilator simulation of the zipsystem.
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# It does not make the system within Vivado or Quartus.
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## It does not make the system within Vivado or Quartus.
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#
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##
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#
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##
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# Creator: Dan Gisselquist, Ph.D.
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## Creator: Dan Gisselquist, Ph.D.
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# Gisselquist Technology, LLC
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## Gisselquist Technology, LLC
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#
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##
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################################################################################
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################################################################################
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#
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##
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# Copyright (C) 2015-2017, Gisselquist Technology, LLC
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## Copyright (C) 2015-2017, Gisselquist Technology, LLC
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#
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##
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# This program is free software (firmware): you can redistribute it and/or
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## This program is free software (firmware): you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as published
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## modify it under the terms of the GNU General Public License as published
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# by the Free Software Foundation, either version 3 of the License, or (at
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## by the Free Software Foundation, either version 3 of the License, or (at
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# your option) any later version.
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## your option) any later version.
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#
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##
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# This program is distributed in the hope that it will be useful, but WITHOUT
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## This program is distributed in the hope that it will be useful, but WITHOUT
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# ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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# for more details.
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## for more details.
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#
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##
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# License: GPL, v3, as defined and found on www.gnu.org,
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## You should have received a copy of the GNU General Public License along
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# http://www.gnu.org/licenses/gpl.html
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## with this program. (It's in the $(ROOT)/doc directory. Run make with no
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#
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## target there if the PDF file isn't present.) If not, see
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#
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## for a copy.
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##
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## License: GPL, v3, as defined and found on www.gnu.org,
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## http://www.gnu.org/licenses/gpl.html
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##
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##
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################################################################################
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################################################################################
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#
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##
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##
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.PHONY: all
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.PHONY: all
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all: zipsystem zipbones cpudefs.h div zipmmu cpuops pfcache
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all: zipsystem zipbones cpudefs.h div zipmmu cpuops pfcache
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CORED:= core
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CORED:= core
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PRPHD:= peripherals
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PRPHD:= peripherals
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AUXD := aux
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EXD := ex
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VSRC := zipsystem.v cpudefs.v \
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VSRC := zipsystem.v cpudefs.v \
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$(PRPHD)/wbdmac.v $(PRPHD)/icontrol.v \
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$(PRPHD)/wbdmac.v $(PRPHD)/icontrol.v \
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$(PRPHD)/zipcounter.v $(PRPHD)/zipjiffies.v \
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$(PRPHD)/zipcounter.v $(PRPHD)/zipjiffies.v \
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$(PRPHD)/ziptimer.v \
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$(PRPHD)/ziptimer.v \
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$(CORED)/zipcpu.v $(CORED)/cpuops.v $(CORED)/idecode.v \
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$(CORED)/zipcpu.v $(CORED)/cpuops.v $(CORED)/idecode.v \
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$(CORED)/pipefetch.v $(CORED)/prefetch.v \
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$(CORED)/pipefetch.v $(CORED)/prefetch.v \
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$(CORED)/pfcache.v \
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$(CORED)/pfcache.v \
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$(CORED)/memops.v $(CORED)/pipemem.v \
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$(CORED)/memops.v $(CORED)/pipemem.v \
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$(CORED)/div.v \
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$(CORED)/div.v \
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$(AUXD)/busdelay.v \
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$(EXD)/busdelay.v \
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$(AUXD)/wbdblpriarb.v $(AUXD)/wbpriarbiter.v \
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$(EXD)/wbdblpriarb.v $(EXD)/wbpriarbiter.v \
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$(CORED)/idecode.v $(CORED)/cpuops.v
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$(CORED)/idecode.v $(CORED)/cpuops.v
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VZIP := zipbones.v cpudefs.v \
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VZIP := zipbones.v cpudefs.v \
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$(CORED)/zipcpu.v $(CORED)/cpuops.v $(CORED)/idecode.v \
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$(CORED)/zipcpu.v $(CORED)/cpuops.v $(CORED)/idecode.v \
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$(CORED)/pipefetch.v $(CORED)/prefetch.v \
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$(CORED)/pipefetch.v $(CORED)/prefetch.v \
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$(CORED)/pfcache.v \
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$(CORED)/pfcache.v \
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$(CORED)/memops.v $(CORED)/pipemem.v \
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$(CORED)/memops.v $(CORED)/pipemem.v \
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$(CORED)/div.v \
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$(CORED)/div.v \
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$(AUXD)/busdelay.v $(AUXD)/wbdblpriarb.v \
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$(EXD)/busdelay.v $(EXD)/wbdblpriarb.v \
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$(CORED)/idecode.v $(CORED)/cpuops.v
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$(CORED)/idecode.v $(CORED)/cpuops.v
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VOBJ := obj_dir
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VOBJ := obj_dir
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SUBMAKE := $(MAKE) --no-print-directory --directory=$(VOBJ) -f
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SUBMAKE := $(MAKE) --no-print-directory --directory=$(VOBJ) -f
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ifeq ($(VERILATOR_ROOT),)
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VERILATOR := verilator
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else
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VERILATOR := $(VERILATOR_ROOT)/bin/verilator
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endif
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# VFLAGS := -Wall -MMD -D__WORDSIZE=64 --trace -cc -y $(CORED) -y $(PRPHD) -y $(EXD)
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VFLAGS := -Wall -MMD --trace -cc -y $(CORED) -y $(PRPHD) -y $(EXD)
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VERILATE=verilator --trace -cc -y $(CORED) -y $(PRPHD) -y $(AUXD)
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VERILATE=$(VERILATOR) $(VFLAGS)
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$(VOBJ)/Vzipsystem.cpp: $(VSRC)
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$(VOBJ)/Vzipsystem.cpp: $(VSRC)
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$(VERILATE) zipsystem.v
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$(VERILATE) zipsystem.v
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$(VOBJ)/Vzipsystem.h: $(VOBJ)/Vzipsystem.cpp
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$(VOBJ)/Vzipsystem.h: $(VOBJ)/Vzipsystem.cpp
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pfcache: $(VOBJ)/Vpfcache__ALL.a
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pfcache: $(VOBJ)/Vpfcache__ALL.a
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.PHONY: clean
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.PHONY: clean
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clean:
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clean:
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rm -rf $(VOBJ) cpudefs.h
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rm -rf $(VOBJ) cpudefs.h
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#
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# Note Verilator's dependency created information, and include it here if we
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# can
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DEPS := $(wildcard $(VOBJ)/*.d)
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ifneq ($(DEPS),)
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include $(DEPS)
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endif
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