| Line 285... |
Line 285... |
// 0x10000 -> External interrupt line is high
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// 0x10000 -> External interrupt line is high
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assign cmd_data = { 7'h00, {(9-EXTERNAL_INTERRUPTS){1'b0}}, i_ext_int,
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assign cmd_data = { 7'h00, {(9-EXTERNAL_INTERRUPTS){1'b0}}, i_ext_int,
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2'b00, cpu_dbg_cc,
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2'b00, cpu_dbg_cc,
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1'b0, cmd_halt, (~cpu_dbg_stall), 1'b0,
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1'b0, cmd_halt, (~cpu_dbg_stall), 1'b0,
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pic_data[15], cpu_reset, cmd_addr };
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pic_data[15], cpu_reset, cmd_addr };
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wire cpu_gie;
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assign cpu_gie = cpu_dbg_cc[1];
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`ifdef USE_TRAP
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`ifdef USE_TRAP
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//
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//
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// The TRAP peripheral
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// The TRAP peripheral
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//
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//
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| Line 366... |
Line 368... |
// be reset any time a task is given control of the CPU.
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// be reset any time a task is given control of the CPU.
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//
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//
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// User task counter
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// User task counter
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wire utc_ack, utc_stall, utc_int;
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wire utc_ack, utc_stall, utc_int;
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wire [31:0] utc_data;
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wire [31:0] utc_data;
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zipcounter utask_ctr(i_clk,(~cpu_halt), sys_cyc,
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zipcounter utask_ctr(i_clk,(~cpu_halt)&&(cpu_gie), sys_cyc,
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(sys_stb)&&(sys_addr == `USER_TASK_CTR),
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(sys_stb)&&(sys_addr == `USER_TASK_CTR),
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sys_we, sys_data,
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sys_we, sys_data,
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utc_ack, utc_stall, utc_data, utc_int);
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utc_ack, utc_stall, utc_data, utc_int);
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// User Op-Stall counter
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// User Op-Stall counter
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wire uoc_ack, uoc_stall, uoc_int;
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wire uoc_ack, uoc_stall, uoc_int;
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wire [31:0] uoc_data;
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wire [31:0] uoc_data;
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zipcounter umstall_ctr(i_clk,(cpu_op_stall), sys_cyc,
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zipcounter umstall_ctr(i_clk,(cpu_op_stall)&&(cpu_gie), sys_cyc,
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(sys_stb)&&(sys_addr == `USER_MSTL_CTR),
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(sys_stb)&&(sys_addr == `USER_MSTL_CTR),
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sys_we, sys_data,
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sys_we, sys_data,
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uoc_ack, uoc_stall, uoc_data, uoc_int);
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uoc_ack, uoc_stall, uoc_data, uoc_int);
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// User PreFetch-Stall counter
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// User PreFetch-Stall counter
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wire upc_ack, upc_stall, upc_int;
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wire upc_ack, upc_stall, upc_int;
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wire [31:0] upc_data;
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wire [31:0] upc_data;
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zipcounter upstall_ctr(i_clk,(cpu_pf_stall), sys_cyc,
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zipcounter upstall_ctr(i_clk,(cpu_pf_stall)&&(cpu_gie), sys_cyc,
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(sys_stb)&&(sys_addr == `USER_PSTL_CTR),
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(sys_stb)&&(sys_addr == `USER_PSTL_CTR),
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sys_we, sys_data,
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sys_we, sys_data,
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upc_ack, upc_stall, upc_data, upc_int);
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upc_ack, upc_stall, upc_data, upc_int);
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// User instruction counter
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// User instruction counter
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wire uic_ack, uic_stall, uic_int;
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wire uic_ack, uic_stall, uic_int;
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wire [31:0] uic_data;
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wire [31:0] uic_data;
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zipcounter uins_ctr(i_clk,(cpu_i_count), sys_cyc,
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zipcounter uins_ctr(i_clk,(cpu_i_count)&&(cpu_gie), sys_cyc,
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(sys_stb)&&(sys_addr == `USER_INST_CTR),
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(sys_stb)&&(sys_addr == `USER_INST_CTR),
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sys_we, sys_data,
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sys_we, sys_data,
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uic_ack, uic_stall, uic_data, uic_int);
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uic_ack, uic_stall, uic_data, uic_int);
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|
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// A little bit of pre-cleanup (actr = accounting counters)
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// A little bit of pre-cleanup (actr = accounting counters)
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