Line 12... |
Line 12... |
; + - (x= 22,y=-4,R0=-5,R1= 2)
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; + - (x= 22,y=-4,R0=-5,R1= 2)
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; - - (x=-22,y=-4,R0= 5,R1=-2)
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; - - (x=-22,y=-4,R0= 5,R1=-2)
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;
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;
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;
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;
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;
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;
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divs: ; Given R0,R1, computer R0 = R0/R1 and R1 = R0%R1 for signed R0,R1
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lib_divs: ; Given R0,R1, computer R0 = R0/R1 and R1 = R0%R1 for signed R0,R1
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SUB 2,SP
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SUB 2,SP
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; (stall)
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STO R2,(SP)
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STO R3,2(SP)
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STO R3,2(SP)
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;
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;
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CLR R3 ; Keep track of resulting sign in R2
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CLR R3 ; Keep track of resulting sign in R2
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TST -1,R0 ; Is R0 negative?
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TST -1,R0 ; Is R0 negative?
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MOV ret_div32s(PC),R2
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MOV ret_div32s(PC),R2
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Line 27... |
Line 27... |
MOV.LT divu_divs_return(PC),R2
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MOV.LT divu_divs_return(PC),R2
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TST -1,R1 ; Is R1 negative?
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TST -1,R1 ; Is R1 negative?
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XOR.LT 1,R3 ; If so, result will be opposite sign of before
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XOR.LT 1,R3 ; If so, result will be opposite sign of before
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NEG.LT R1 ; Now we get R1=ABS(R1)
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NEG.LT R1 ; Now we get R1=ABS(R1)
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MOV.LT divu_divs_return(PC),R2
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MOV.LT divu_divs_return(PC),R2
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STO R2,1(SP)
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BRA lib_divu ; Do our unsigned multiply
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BRA divu ; Do our unsigned multiply
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; JSR divu ; Do our unsigned multiply
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; JSR divu ; Do our unsigned multiply
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divu_divs_return:
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divu_divs_return:
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TST 1,R3 ; Check resulting sign
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TST 1,R3 ; Check resulting sign
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NEG.NE R0 ; Need to flip the sign of our result
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NEG.NE R0 ; Need to flip the sign of our result
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TST 2,R3 ; Now, if R1 was originally negative
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TST 2,R3 ; Now, if R1 was originally negative
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NEG.NE R1 ; Then negate R1
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NEG.NE R1 ; Then negate R1
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ret_div32s:
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ret_div32s:
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LOD (SP),R2
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LOD 2(SP),R3
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LOD 2(SP),R3
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LOD 3(SP),R2
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ADD 2,SP
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ADD 2,SP
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JMP R2
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JMP R2
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