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https://opencores.org/ocsvn/zipcpu/zipcpu/trunk
[/] [zipcpu/] [trunk/] [sw/] [zasm/] [sys.i] - Diff between revs 34 and 36
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| Rev 34 |
Rev 36 |
| Line 42... |
Line 42... |
sys.sleep equ 0x010
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sys.sleep equ 0x010
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sys.ccv equ 0x008
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sys.ccv equ 0x008
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sys.ccn equ 0x004
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sys.ccn equ 0x004
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sys.ccc equ 0x002
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sys.ccc equ 0x002
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sys.ccz equ 0x001
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sys.ccz equ 0x001
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sys.bu.pic equ 0x000
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sys.bus.pic equ 0x000
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sys.bus.wdt equ 0x001
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sys.bus.wdt equ 0x001
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sys.bus.cache equ 0x002
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sys.bus.cache equ 0x002
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sys.bus.ctrpic equ 0x003
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sys.bus.ctrpic equ 0x003
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sys.bus.tma equ 0x004
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sys.bus.tma equ 0x004
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|
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| Line 118... |
Line 118... |
STO RG,1(SP) \
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STO RG,1(SP) \
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JMP LBL \
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JMP LBL \
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ADD 1,SP
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ADD 1,SP
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#define RET LOD 1(SP),PC
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#define RET LOD 1(SP),PC
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#define SAVE_USER_CONTEXT(DR,AR) \
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#define SAVE_USER_CONTEXT(DR,AR) \
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MOV -16(uSP),AR \
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MOV -15(uSP),AR \
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MOV uPC,DR \
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MOV uPC,DR \
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STO DR,16(AR) \
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MOV uCC,DR \
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STO DR,15(AR) \
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STO DR,15(AR) \
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MOV uSP,DR \
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MOV uCC,DR \
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STO DR,14(AR) \
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STO DR,14(AR) \
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MOV uR12,DR \
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MOV uR12,DR \
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STO DR,13(AR) \
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STO DR,13(AR) \
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MOV uR11,DR \
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MOV uR11,DR \
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STO DR,12(AR) \
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STO DR,12(AR) \
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| Line 179... |
Line 177... |
LOD 12(AR),DR \
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LOD 12(AR),DR \
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MOV DR,uR11 \
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MOV DR,uR11 \
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LOD 13(AR),DR \
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LOD 13(AR),DR \
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MOV DR,uR12 \
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MOV DR,uR12 \
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LOD 14(AR),DR \
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LOD 14(AR),DR \
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MOV DR,uSP \
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LOD 15(AR),DR \
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MOV DR,uCC \
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MOV DR,uCC \
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LOD 16(AR),DR \
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LOD 15(AR),DR \
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MOV DR,uPC
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MOV DR,uPC
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#define READ_USER_TRAP(RG) \
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#define READ_USER_TRAP(RG) \
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MOV uCC,RG \
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MOV uCC,RG \
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AND -256,RG
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AND -256,RG
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|
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