| Line 9... |
Line 9... |
; beyond the generic operation of the CPU.
|
; beyond the generic operation of the CPU.
|
;
|
;
|
; Status: As of August, 2015, this file assembles, builds, and passes
|
; Status: As of August, 2015, this file assembles, builds, and passes
|
; all of its tests in the Verilator simulator.
|
; all of its tests in the Verilator simulator.
|
;
|
;
|
|
; Okay, as of 15 August, there are now some tests that don't pass.
|
|
; In particular, the #include test used to pass but didn't pass today.
|
|
; Likewise the PUSH() macro test hasn't passed yet. Finally, be aware
|
|
; that this implementation is specific to where it loads on a board.
|
|
; I tried loading it on my Basys development board, where I had placed
|
|
; RAM in a different location and ... things didn't work out so well.
|
|
; So grep the __here__ line and adjust it for where you intend to load
|
|
; this file.
|
|
;
|
|
; In general, as I'm building the CPU, I'm modifying this file to place
|
|
; more and more capability tests within the file. If the Lord is
|
|
; willing, this will become the proof that the CPU completely works.
|
|
;
|
|
;
|
; Creator: Dan Gisselquist, Ph.D.
|
; Creator: Dan Gisselquist, Ph.D.
|
; Gisselquist Tecnology, LLC
|
; Gisselquist Tecnology, LLC
|
;
|
;
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
;
|
;
|
| Line 32... |
Line 46... |
; http://www.gnu.org/licenses/gpl.html
|
; http://www.gnu.org/licenses/gpl.html
|
;
|
;
|
;
|
;
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
;
|
;
|
#include "sys.i"
|
// #include "sys.i"
|
sys.bus equ 0xc0000000
|
sys.bus equ 0xc0000000
|
sys.breaken equ 0x080
|
sys.breaken equ 0x080
|
sys.step equ 0x040
|
sys.step equ 0x040
|
sys.gie equ 0x020
|
sys.gie equ 0x020
|
sys.sleep equ 0x010
|
sys.sleep equ 0x010
|
| Line 106... |
Line 120... |
mov R0,uR12
|
mov R0,uR12
|
mov R0,uR13
|
mov R0,uR13
|
mov R0,uCC
|
mov R0,uCC
|
; Don't clear the user PC register
|
; Don't clear the user PC register
|
; Now, let's try loading some constants into registers
|
; Now, let's try loading some constants into registers
|
|
; Specifically, we're testing the LDI, LDIHI, and LDILO instructions
|
dead_beef equ 0xdeadbeef
|
dead_beef equ 0xdeadbeef
|
ldi 0x0dead,r5
|
ldi 0x0dead,r5
|
ldi 0x0beef,r6
|
ldi 0x0beef,r6
|
ldi 0xdeadbeef,r7
|
ldi 0xdeadbeef,r7
|
ldihi 0xdead, r8
|
ldihi 0xdead, r8
|
| Line 370... |
Line 385... |
sto r0,(r1)
|
sto r0,(r1)
|
bgt mem_loop
|
bgt mem_loop
|
cmp $5,r2
|
cmp $5,r2
|
trap.ne r11
|
trap.ne r11
|
|
|
|
// Let's test whether LSL works
|
|
ldi $0x0b00,r11
|
|
ldi 0x035,r2
|
|
lsl 8,r2
|
|
ldi 0x03500,r1
|
|
cmp r2,r1
|
|
trap.ne r11
|
|
ldi 0x074,r0
|
|
and 0x0ff,r0
|
|
or r0,r2
|
|
cmp 0x03574,r2
|
|
trap.ne r11
|
|
|
// Return success / Test the trap interrupt
|
// Return success / Test the trap interrupt
|
clr r11
|
clr r11
|
trap r11
|
trap r11
|
noop
|
noop
|
noop
|
noop
|
| Line 382... |
Line 410... |
|
|
// And, in case we miss a halt ...
|
// And, in case we miss a halt ...
|
halt
|
halt
|
|
|
// Now, let's test whether or not we can handle a subroutine
|
// Now, let's test whether or not we can handle a subroutine
|
|
#ifdef PUSH_TEST
|
reverse_bit_order:
|
reverse_bit_order:
|
PUSH(R1,SP)
|
PUSH(R1,SP)
|
PUSH(R2,SP)
|
PUSH(R2,SP)
|
LDI 32,R1
|
LDI 32,R1
|
CLR R2
|
CLR R2
|
| Line 396... |
Line 425... |
BNZ reverse_bit_order_loop
|
BNZ reverse_bit_order_loop
|
MOV R2,R0
|
MOV R2,R0
|
POP(R2,SP)
|
POP(R2,SP)
|
POP(R1,SP)
|
POP(R1,SP)
|
RET
|
RET
|
|
#endif
|
fill 512,0
|
fill 512,0
|
stack:
|
stack:
|
word 0
|
word 0
|
