| Line 82... |
Line 82... |
#define LOOP_TEST
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#define LOOP_TEST
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#define SHIFT_TEST
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#define SHIFT_TEST
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#define TRAP_TEST
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#define TRAP_TEST
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#define MPY_TEST
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#define MPY_TEST
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#define PUSH_TEST
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#define PUSH_TEST
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#define PIPELINE_STACK_TEST
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#define MEM_PIPELINE_TEST
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test:
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test:
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#ifdef DO_TEST_ASSEMBLER
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#ifdef DO_TEST_ASSEMBLER
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; We start out by testing our assembler. We give it some instructions, which
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; We start out by testing our assembler. We give it some instructions, which
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; are then manually checked by disassembling/dumping the result and making
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; are then manually checked by disassembling/dumping the result and making
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; certain they match. This is not an automated test, but it is an important
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; certain they match. This is not an automated test, but it is an important
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| Line 518... |
Line 520... |
trap.ne r11
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trap.ne r11
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cmp r0,r7
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cmp r0,r7
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trap.ne r11
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trap.ne r11
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#endif
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#endif
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#define PIPELINE_STACK_TEST
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#ifdef PIPELINE_STACK_TEST
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#ifdef PIPELINE_STACK_TEST
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ldi $0x0f000,r11 // Mark our test
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ldi $0x0f000,r11 // Mark our test
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LDI 1,R0
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LDI 1,R0
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MOV 1(R0),R1
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MOV 1(R0),R1
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MOV 1(R1),R2
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MOV 1(R1),R2
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| Line 544... |
Line 545... |
CMP 6,R5
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CMP 6,R5
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trap.ne R11
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trap.ne R11
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CMP 7,R6
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CMP 7,R6
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trap.ne R11
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trap.ne R11
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#endif
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#endif
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#ifdef MEM_PIPELINE_TEST
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JSR(mem_pipeline_test,R0)
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#endif // MEM_PIPELINE_TEST
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// Return success / Test the trap interrupt
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// Return success / Test the trap interrupt
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clr r11
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clr r11
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trap r11
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trap r11
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noop
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noop
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noop
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noop
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| Line 620... |
Line 626... |
LOD 13(SP),R12
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LOD 13(SP),R12
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ADD 13,SP
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ADD 13,SP
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LOD 1(SP),PC
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LOD 1(SP),PC
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#endif // PIPELINE_STACK_TEST
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#endif // PIPELINE_STACK_TEST
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#ifdef MEM_PIPELINE_TEST
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mem_pipeline_test:
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SUB 4,SP
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STO R0,1(SP)
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STO R1,2(SP)
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LDI 0x10000,R11
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;
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; Test #1 ... Let's start by writing a value to memory
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LDI -1,R0
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CLR R1
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STO R0,3(SP)
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LOD 3(SP),R1
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CMP R1,R0
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MOV.NZ R11,CC
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; Test #2, reading and then writing a value from memory
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NOP
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NOP
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CLR R0
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CLR R1
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LOD 3(SP),R0 ; This should load back up our -1 value
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STO R0,4(SP)
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; Insist that the pipeline clear
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LOD 3(SP),R0
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; Now let's try loading into R1
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NOP
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NOP
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NOP
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NOP
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LOD 4(SP),R1
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CMP R1,R0
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MOV.NZ R11,CC
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LOD 1(SP),R0
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LOD 2(SP),R1
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ADD 4,SP
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RETN
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#endif
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fill 512,0
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fill 512,0
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stack: // Must point to a valid word initially
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stack: // Must point to a valid word initially
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word 0
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word 0
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