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https://opencores.org/ocsvn/zipcpu/zipcpu/trunk
[/] [zipcpu/] [trunk/] [sw/] [zasm/] [zopcodes.h] - Diff between revs 70 and 89
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| Rev 70 |
Rev 89 |
| Line 35... |
Line 35... |
//
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//
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////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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#ifndef ZOPCODES_H
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#ifndef ZOPCODES_H
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#define ZOPCODES_H
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#define ZOPCODES_H
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#define OPUNUSED -1
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#define ZIP_OPUNUSED -1
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#define ISUSEROP(A) ((a&(~0x0f))==0x000)
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#define ISUSEROP(A) ((a&(~0x0f))==0x000)
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#define ISSUPROP(A) ((a&(~0x0f))==0x010)
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#define ISSUPROP(A) ((a&(~0x0f))==0x010)
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#define ISLCLROP(A) ((a&(~0x0f))==0x020)
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#define ISLCLROP(A) ((a&(~0x0f))==0x020)
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#define BITFIELD(LN,MN) (((LN&0x0ff)<<8)+(MN&0x0ff))
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#define ZIP_BITFIELD(LN,MN) (((LN&0x0ff)<<8)+(MN&0x0ff))
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#define REGFIELD(MN) (0x00000400 +(MN&0x0ff))
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#define ZIP_REGFIELD(MN) (0x00000400 +(MN&0x0ff))
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#define URGFIELD(MN) (0x0100400 +(MN&0x0ff))
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#define ZIP_URGFIELD(MN) (0x0100400 +(MN&0x0ff))
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#define SRGFIELD(MN) (0x0200400 +(MN&0x0ff))
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#define ZIP_SRGFIELD(MN) (0x0200400 +(MN&0x0ff))
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#define IMMFIELD(LN,MN) (0x40000000 + (((LN&0x0ff)<<8)+(MN&0x0ff))) // Sgn extnd
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#define ZIP_IMMFIELD(LN,MN) (0x40000000 + (((LN&0x0ff)<<8)+(MN&0x0ff))) // Sgn extnd
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// #define REGVAL(V) ((V & 0x0f)+0x020)
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// #define REGVAL(V) ((V & 0x0f)+0x020)
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typedef unsigned int ZIPI; // A Zip CPU instruction
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typedef unsigned int ZIPI; // A Zip CPU instruction
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typedef struct {
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typedef struct {
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