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https://opencores.org/ocsvn/6809_6309_compatible_core/6809_6309_compatible_core/trunk
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/* Verilog module instantiation template generated by SCUBA Diamond_2.2_Production (99) */
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/* Verilog module instantiation template generated by SCUBA Diamond_2.2_Production (99) */
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/* Module Version: 7.2 */
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/* Module Version: 7.2 */
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/* Sat Dec 28 21:50:48 2013 */
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/* Fri Jan 3 08:42:51 2014 */
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/* parameterized module instance */
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/* parameterized module instance */
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bios2k __ (.DataInA( ), .DataInB( ), .AddressA( ), .AddressB( ),
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bios2k __ (.DataInA( ), .DataInB( ), .AddressA( ), .AddressB( ),
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.ClockA( ), .ClockB( ), .ClockEnA( ), .ClockEnB( ), .WrA( ), .WrB( ),
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.ClockA( ), .ClockB( ), .ClockEnA( ), .ClockEnB( ), .WrA( ), .WrB( ),
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.ResetA( ), .ResetB( ), .QA( ), .QB( ));
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.ResetA( ), .ResetB( ), .QA( ), .QB( ));
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