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https://opencores.org/ocsvn/System09/System09/trunk
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| Rev 66 |
Rev 94 |
| Line 267... |
Line 267... |
clk : in std_logic;
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clk : in std_logic;
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rst : in std_logic;
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rst : in std_logic;
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cs : in std_logic;
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cs : in std_logic;
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rw : in std_logic;
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rw : in std_logic;
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addr : in std_logic_vector (11 downto 0);
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addr : in std_logic_vector (11 downto 0);
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rdata : out std_logic_vector (7 downto 0);
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data_out : out std_logic_vector (7 downto 0);
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wdata : in std_logic_vector (7 downto 0)
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data_in : in std_logic_vector (7 downto 0)
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);
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);
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end component;
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end component;
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----------------------------------------
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----------------------------------------
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--
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--
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| Line 285... |
Line 285... |
clk : in std_logic;
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clk : in std_logic;
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rst : in std_logic;
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rst : in std_logic;
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cs : in std_logic;
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cs : in std_logic;
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rw : in std_logic;
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rw : in std_logic;
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addr : in std_logic_vector (12 downto 0);
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addr : in std_logic_vector (12 downto 0);
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rdata : out std_logic_vector (7 downto 0);
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data_out : out std_logic_vector (7 downto 0);
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wdata : in std_logic_vector (7 downto 0)
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data_in : in std_logic_vector (7 downto 0)
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);
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);
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end component;
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end component;
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----------------------------------------
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----------------------------------------
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--
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--
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| Line 469... |
Line 469... |
clk => cpu_clk,
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clk => cpu_clk,
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rst => cpu_reset,
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rst => cpu_reset,
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cs => rom_cs,
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cs => rom_cs,
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rw => '1',
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rw => '1',
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addr => cpu_addr(11 downto 0),
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addr => cpu_addr(11 downto 0),
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rdata => rom_data_out,
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data_out => rom_data_out,
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wdata => cpu_data_out
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data_in => cpu_data_out
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);
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);
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my_flex : flex_ram port map (
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my_flex : flex_ram port map (
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clk => cpu_clk,
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clk => cpu_clk,
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rst => cpu_reset,
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rst => cpu_reset,
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cs => flex_cs,
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cs => flex_cs,
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rw => cpu_rw,
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rw => cpu_rw,
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addr => cpu_addr(12 downto 0),
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addr => cpu_addr(12 downto 0),
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rdata => flex_data_out,
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data_out => flex_data_out,
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wdata => cpu_data_out
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data_in => cpu_data_out
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);
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);
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my_dat : dat_ram port map (
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my_dat : dat_ram port map (
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clk => cpu_clk,
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clk => cpu_clk,
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rst => cpu_reset,
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rst => cpu_reset,
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