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[/] [System09/] [trunk/] [rtl/] [VHDL/] [spp.vhd] - Diff between revs 66 and 99

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--===========================================================================----
--===========================================================================--
--
--                                                                           --
--  S Y N T H E Z I A B L E    spp - Simple Parallel Port
--              Synthesizable Simple Parallel Port                           --
--
--                                                                           --
--  www.OpenCores.Org - September 2003
--===========================================================================--
--  This core adheres to the GNU public license  
 
--
--
-- File name      : spp.vhd
-- File name      : spp.vhd
--
--
-- Purpose        : Simple Parallel Port for System09
--  Entity name    : spp
 
--
 
--  Purpose        : implements a Simple Parallel Port for System09
--
--
-- Dependencies   : ieee.Std_Logic_1164
-- Dependencies   : ieee.Std_Logic_1164
--                  ieee.std_logic_unsigned
--                  ieee.std_logic_unsigned
--
--
-- Uses           : None
-- Uses           : None
--
--
-- Author         : John E. Kent      
-- Author         : John E. Kent      
--                  dilbert57@opencores.org      
 
--
--
--===========================================================================----
--  Email          : dilbert57@opencores.org      
--
--
-- Revision History:
--  Web            : http://opencores.org/project,system09
--===========================================================================--
 
--
--
-- Version 0.1 - 6th Sep 2008
--  Description    : Register Memory Map
--  Generated from ioport.vhd
 
--
--
--===========================================================================
--  Address                                MSB                         LSB
 
--                                    Bit:   7   6   5   4   3   2   1   0
 
--  Base+$00 (SPP Data port)    Write Pin:   9   8   7   6   5   4   3   2
 
--  Base+$01 (SPP Status port)  Read  Pin: ~11  10  12  13  15   -   -   -                      
 
--  Base+$02 (SPP Control port) Write Pin:   -   -   -   - ~17  16 ~14  ~1
 
--  Base+$03 (EPP Address port) R/W
 
--  Base+$04 (EPP Data port)    R/W
--
--
 
--  ~ indicates a hardware inversion of the bit.
--  Parallel printer port pin assignment
--  Parallel printer port pin assignment
-- 
-- 
--  Pin No (DB25) SPP Signal      EPP Signal    Direction Register  Bit Inverted
--  Pin No (DB25) SPP Signal      EPP Signal    Direction Register  Bit Inverted
--  1             nStrobe            Write_n       Out       Control-0 Yes
--  1             nStrobe            Write_n       Out       Control-0 Yes
--  2             Data0           Data0         In/Out    Data-0        No
--  2             Data0           Data0         In/Out    Data-0        No
Line 41... Line 46...
--  9             Data7           Data7         In/Out    Data-7        No
--  9             Data7           Data7         In/Out    Data-7        No
--  10            nAck            Interrupt     In        Status-6  No
--  10            nAck            Interrupt     In        Status-6  No
--  11            Busy            Wait          In        Status-7  Yes
--  11            Busy            Wait          In        Status-7  Yes
--  12            Paper-Out       Spare         In        Status-5  No
--  12            Paper-Out       Spare         In        Status-5  No
--  13            Select          Spare         In        Status-4  No
--  13            Select          Spare         In        Status-4  No
-- 
 
--  14            Linefeed        Data_Strobe_n Out       Control-1 Yes
--  14            Linefeed        Data_Strobe_n Out       Control-1 Yes
--  15            nError          Spare         In        Status-3  No
--  15            nError          Spare         In        Status-3  No
--  16             nInitialize     Reset         Out       Control-2 No
--  16             nInitialize     Reset         Out       Control-2 No
--  17             nSelect-Printer Addr_Strobe_n Out       Control-3 Yes
--  17             nSelect-Printer Addr_Strobe_n Out       Control-3 Yes
--  18-25          Ground          Ground        -         -         -
--  18-25          Ground          Ground        -         -         -
-- 
-- 
--  Address                              MSB                         LSB
--  Copyright (C) 2008 - 2010 John Kent
--                                 Bit:    7   6   5   4   3   2   1   0
 
-- Base   (SPP Data port)    Write Pin:          9   8   7   6   5   4   3   2
 
-- Base+1 (SPP Status port)  Read  Pin:  ~11  10  12  13  15                            
 
-- Base+2 (SPP Control port) Write Pin:                  ~17  16 ~14  ~1
 
-- Base+3 (EPP Address port) R/W
 
-- Base+4 (EPP Data port)    R/W
 
-- 
-- 
--  ~ indicates a hardware inversion of the bit.
--  This program is free software: you can redistribute it and/or modify
 
--  it under the terms of the GNU General Public License as published by
 
--  the Free Software Foundation, either version 3 of the License, or
 
--  (at your option) any later version.
 
--
 
--  This program is distributed in the hope that it will be useful,
 
--  but WITHOUT ANY WARRANTY; without even the implied warranty of
 
--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 
--  GNU General Public License for more details.
 
--
 
--  You should have received a copy of the GNU General Public License
 
--  along with this program.  If not, see <http://www.gnu.org/licenses/>.
-- 
-- 
 
--===========================================================================--
 
--                                                                           --
 
--                    Revision History                                       --
 
--                                                                           --
 
--===========================================================================--
 
--
 
-- Version  Date       Author      Description
 
-- 0.1      2008-09-06 John Kent   Initial version generated from ioport.vhd
 
-- 0.2      2010-08-09 John Kent   Updated Header and added GPL
 
--
 
--===========================================================================
 
 
library ieee;
library ieee;
  use ieee.std_logic_1164.all;
  use ieee.std_logic_1164.all;
  use ieee.std_logic_unsigned.all;
  use ieee.std_logic_unsigned.all;
 
 

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