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[/] [a-z80/] [trunk/] [cpu/] [control/] [timing_macros.i] - Diff between revs 8 and 13
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| Rev 8 |
Rev 13 |
| Line 321... |
Line 321... |
DI_EI ctl_iffx_bit=op3; ctl_iffx_we=1; // DI/EI
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DI_EI ctl_iffx_bit=op3; ctl_iffx_we=1; // DI/EI
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IM ctl_im_we=1; // IM n ('n' is read by opcode[4:3])
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IM ctl_im_we=1; // IM n ('n' is read by opcode[4:3])
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WZ=IX+d ixy_d=1; // Compute WZ=IX+d
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WZ=IX+d ixy_d=1; // Compute WZ=IX+d
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IX_IY ctl_state_ixiy_we=1; ctl_state_iy_set=op5; setIXIY=1; // IX/IY prefix
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IX_IY ctl_state_ixiy_we=1; ctl_state_iy_set=op5; setIXIY=1; // IX/IY prefix
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CLR_IX_IY ctl_state_ixiy_we=1; ctl_state_ixiy_clr=~setIXIY; // Clear IX/IY flag
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CLR_IX_IY ctl_state_ixiy_we=1; ctl_state_ixiy_clr=~setIXIY; // Clear IX/IY flag if not explicitly set
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CB ctl_state_tbl_cb_set=1; setCBED=1; // CB-table prefix
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CB ctl_state_tbl_we=1; ctl_state_tbl_cb_set=1; // CB-table prefix
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ED ctl_state_tbl_ed_set=1; setCBED=1; // ED-table prefix
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ED ctl_state_tbl_we=1; ctl_state_tbl_ed_set=1; // ED-table prefix
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CLR_CB_ED ctl_state_tbl_clr=~setCBED; // Clear CB/ED prefix
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CLR_CB_ED ctl_state_tbl_we=1; // Clear CB/ED prefix if not explicitly set
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// If the NF is set, complement HF and CF on the way out to the bus
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// If the NF is set, complement HF and CF on the way out to the bus
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// This is used to correctly set those flags after subtraction operations
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// This is used to correctly set those flags after subtraction operations
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?NF_HF_CF ctl_flags_hf_cpl=flags_nf; ctl_flags_cf_cpl=flags_nf;
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?NF_HF_CF ctl_flags_hf_cpl=flags_nf; ctl_flags_cf_cpl=flags_nf;
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?NF_HF ctl_flags_hf_cpl=flags_nf;
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?NF_HF ctl_flags_hf_cpl=flags_nf;
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