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[/] [a-z80/] [trunk/] [cpu/] [top-level-files.txt] - Diff between revs 6 and 8
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This is a list of source files that are part of the top-level design.
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This is a list of A-Z80 top-level files and their dependencies.
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It is read by various Python scripts for the top level integration and
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These files comprise the A-Z80 CPU proper. Use export.py to copy
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synthesis. Every line that does not refer to a valid file is ignored.
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them into your project folder.
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------ Control block -------
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------ Control block -------
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control/clk_delay.v
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control/clk_delay.v
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control/decode_state.v
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control/decode_state.v
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control/exec_module.vh
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control/exec_module.vh
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control/execute.sv
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control/execute.v
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+ control/exec_matrix.vh
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+ control/exec_matrix_compiled.vh
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+ control/exec_module.vh
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+ control/exec_zero.vh
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+ control/temp_wires.vh
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control/interrupts.v
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control/interrupts.v
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control/ir.v
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control/ir.v
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control/pin_control.v
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control/pin_control.v
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control/pla_decode.sv
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control/pla_decode.v
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control/resets.v
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control/resets.v
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control/memory_ifc.v
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control/memory_ifc.v
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control/sequencer.v
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control/sequencer.v
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---------- ALU -------------
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---------- ALU -------------
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alu/alu_control.v
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alu/alu_control.v
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+ alu/alu_mux_4.v
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+ alu/alu_mux_8.v
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alu/alu_select.v
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alu/alu_select.v
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alu/alu_flags.v
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alu/alu_flags.v
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+ alu/alu_mux_2.v
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+ alu/alu_mux_4.v
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alu/alu.v
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alu/alu.v
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+ alu/alu_core.v
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+ alu/alu_slice.v
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+ alu/alu_bit_select.v
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+ alu/alu_shifter_core.v
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+ alu/alu_mux_2z.v
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+ alu/alu_mux_3z.v
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+ alu/alu_prep_daa.v
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------ Register file -------
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------ Register file -------
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registers/reg_file.v
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registers/reg_file.v
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+ registers/reg_latch.v
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registers/reg_control.v
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registers/reg_control.v
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------ Address latch -------
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------ Address latch -------
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bus/address_latch.v
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bus/address_latch.v
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+ bus/address_mux.v
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+ bus/inc_dec.v
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+ bus/inc_dec_2bit.v
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bus/address_pins.v
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bus/address_pins.v
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--------- Misc bus ---------
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--------- Misc bus ---------
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bus/bus_control.v
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bus/bus_control.v
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bus/bus_switch.sv
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bus/bus_switch.v
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+ bus/data_switch.v
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+ bus/data_switch_mask.v
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------ I/O pin control -----
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------ I/O pin control -----
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bus/data_pins.v
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bus/data_pins.v
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bus/control_pins_n.v
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bus/control_pins_n.v
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--------- Top level --------
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+ toplevel/z80_top_direct_n.v
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+ toplevel/core.vh
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+ toplevel/coremodules.vh
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+ toplevel/globals.vh
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Files=49
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