/*----------------------------------------------------------------
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/*----------------------------------------------------------------
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// //
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// //
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// start.S //
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// start.S //
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// //
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// //
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// This file is part of the Amber project //
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// This file is part of the Amber project //
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// http://www.opencores.org/project,amber //
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// http://www.opencores.org/project,amber //
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// //
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// //
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// Description //
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// Description //
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// Assembly routines for boot-loader. //
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// Assembly routines for boot-loader. //
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// As boot-loader is a stand-alone application, it needs a //
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// As boot-loader is a stand-alone application, it needs a //
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// simple start function written in assembly to call the //
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// simple start function written in assembly to call the //
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// C code main() function. //
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// C code main() function. //
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// //
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// //
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// Author(s): //
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// Author(s): //
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// - Conor Santifort, csantifort.amber@gmail.com //
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// - Conor Santifort, csantifort.amber@gmail.com //
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// //
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// //
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//////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////
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// //
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// //
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// Copyright (C) 2010 Authors and OPENCORES.ORG //
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// Copyright (C) 2010 Authors and OPENCORES.ORG //
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// //
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// //
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// This source file may be used and distributed without //
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// This source file may be used and distributed without //
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// restriction provided that this copyright statement is not //
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// restriction provided that this copyright statement is not //
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// removed from the file and that any derivative work contains //
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// removed from the file and that any derivative work contains //
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// the original copyright notice and the associated disclaimer. //
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// the original copyright notice and the associated disclaimer. //
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// //
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// //
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// This source file is free software; you can redistribute it //
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// This source file is free software; you can redistribute it //
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// and/or modify it under the terms of the GNU Lesser General //
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// and/or modify it under the terms of the GNU Lesser General //
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// Public License as published by the Free Software Foundation; //
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// Public License as published by the Free Software Foundation; //
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// either version 2.1 of the License, or (at your option) any //
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// either version 2.1 of the License, or (at your option) any //
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// later version. //
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// later version. //
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// //
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// //
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// This source is distributed in the hope that it will be //
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// This source is distributed in the hope that it will be //
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// useful, but WITHOUT ANY WARRANTY; without even the implied //
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// useful, but WITHOUT ANY WARRANTY; without even the implied //
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// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //
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// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //
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// PURPOSE. See the GNU Lesser General Public License for more //
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// PURPOSE. See the GNU Lesser General Public License for more //
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// details. //
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// details. //
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// //
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// //
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// You should have received a copy of the GNU Lesser General //
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// You should have received a copy of the GNU Lesser General //
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// Public License along with this source; if not, download it //
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// Public License along with this source; if not, download it //
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// from http://www.opencores.org/lgpl.shtml //
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// from http://www.opencores.org/lgpl.shtml //
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// //
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// //
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----------------------------------------------------------------*/
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----------------------------------------------------------------*/
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#include "amber_registers.h"
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#include "amber_registers.h"
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#include "address_map.h"
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#include "address_map.h"
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/* Defined in vmlinux/include/asm-arm/setup.h */
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/* Defined in vmlinux/include/asm-arm/setup.h */
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#define ATAG_CORE 0x54410001
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#define ATAG_CORE 0x54410001
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#define ATAG_MEM 0x54410002
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#define ATAG_MEM 0x54410002
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#define ATAG_INITRD 0x54410005
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#define ATAG_INITRD 0x54410005
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#define ATAG_RAMDISK 0x54410004
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#define ATAG_RAMDISK 0x54410004
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#define ATAG_NONE 0x00000000
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#define ATAG_NONE 0x00000000
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#define ATAG_CORE_SIZE ((2*4 + 3*4) >> 2)
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#define ATAG_CORE_SIZE ((2*4 + 3*4) >> 2)
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#define ATAG_MEM_SIZE ((2*4 + 2*4) >> 2)
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#define ATAG_MEM_SIZE ((2*4 + 2*4) >> 2)
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#define ATAG_INITRD_SIZE ((2*4 + 2*4) >> 2)
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#define ATAG_INITRD_SIZE ((2*4 + 2*4) >> 2)
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#define ATAG_RAMDISK_SIZE ((2*4 + 3*4) >> 2)
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#define ATAG_RAMDISK_SIZE ((2*4 + 3*4) >> 2)
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/* from vmlinux/arch/arm/kernel/compat.c */
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/* from vmlinux/arch/arm/kernel/compat.c */
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#define FLAG_READONLY 1
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#define FLAG_READONLY 1
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/* from the list in wmlinux/arch/arm/tools/mach-types */
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/* from the list in wmlinux/arch/arm/tools/mach-types */
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#define MACH_TYPE_A5K 11
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#define MACH_TYPE_A5K 11
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.section .text
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.section .text
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.globl start
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.globl start
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start:
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start:
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/* 0x00 Reset Interrupt vector address */
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/* 0x00 Reset Interrupt vector address */
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b startup
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b startup
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/* 0x04 Undefined Instruction Interrupt vector address */
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/* 0x04 Undefined Instruction Interrupt vector address */
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b _testfail
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b _testfail
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/* 0x08 SWI Interrupt vector address */
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/* 0x08 SWI Interrupt vector address */
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b _testfail
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b _testfail
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/* 0x0c Prefetch abort Interrupt vector address */
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/* 0x0c Prefetch abort Interrupt vector address */
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b _testfail
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b _testfail
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/* 0x10 Data abort Interrupt vector address */
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/* 0x10 Data abort Interrupt vector address */
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b _testfail
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b _testfail
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b _testfail
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b _testfail
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/* 0x18 IRQ vector address */
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/* 0x18 IRQ vector address */
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b service_irq
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b service_irq
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/* 0x1c FIRQ vector address */
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/* 0x1c FIRQ vector address */
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b _testfail
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b _testfail
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.global _restart
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.global _restart
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_restart:
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_restart:
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@ jump to address 0 in irq mode
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@ jump to address 0 in irq mode
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mov pc, #0x00000002
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mov pc, #0x00000002
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nop
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nop
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nop
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nop
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nop
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nop
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startup:
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startup:
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/* copy program to exec space */
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/* copy program to exec space */
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mov r0, #0
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mov r0, #0
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ldr r1, AdrExecBase
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ldr r1, AdrExecBase
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1: ldm r0!, {r2-r9}
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1: ldm r0!, {r2-r9}
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stm r1!, {r2-r9}
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stm r1!, {r2-r9}
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cmp r0, #0x4000
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cmp r0, #0x4000
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bne 1b
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bne 1b
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/* Fix the interrupt jump pointers */
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/* Fix the interrupt jump pointers */
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ldr r0, AdrExecBase
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ldr r0, AdrExecBase
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mov r1, r0, lsr #2
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mov r1, r0, lsr #2
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mov r2, #0
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mov r2, #0
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2: ldr r3, [r2]
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2: ldr r3, [r2]
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orr r3, r3, r1
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orr r3, r3, r1
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str r3, [r2], #4
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str r3, [r2], #4
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cmp r2, #0x1c
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cmp r2, #0x1c
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bne 2b
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bne 2b
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/* Jump to 2f but offset from ExecBase not current location */
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/* Jump to 2f but offset from ExecBase not current location */
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3: ldr r0, AdrExecBase
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3: ldr r0, AdrExecBase
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ldr r1, AdrJumpPoint
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ldr r1, AdrJumpPoint
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orr r0, r0, r1
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orr r0, r0, r1
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mov pc, r0
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mov pc, r0
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_jump_point:
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_jump_point:
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/* Switch to IRQ Mode */
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/* Switch to IRQ Mode */
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mov r0, #0x00000002
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mov r0, #0x00000002
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teqp pc, r0
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teqp pc, r0
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/* Set IRQ Mode stack pointer */
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/* Set IRQ Mode stack pointer */
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ldr sp, AdrIRQStack
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ldr sp, AdrIRQStack
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/* Switch to SVC mode and Unset interrupt mask bits */
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/* Switch to SVC mode and Unset interrupt mask bits */
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mov r0, #0x00000003
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mov r0, #0x00000003
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teqp pc, r0
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teqp pc, r0
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@ Enable the cache
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@ Enable the cache
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@ set region 24 to be uncached. Used for packet buffers
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@ set region 24 to be uncached. Used for packet buffers
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mov r0, #0xfeffffff
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mov r0, #0xfeffffff
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mcr 15, 0, r0, cr3, cr0, 0 @ cacheable area
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mcr 15, 0, r0, cr3, cr0, 0 @ cacheable area
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mov r0, #1
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mov r0, #1
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mcr 15, 0, r0, cr2, cr0, 0 @ cache enable
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mcr 15, 0, r0, cr2, cr0, 0 @ cache enable
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@ init SP
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@ init SP
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ldr sp, AdrStack
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ldr sp, AdrStack
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@ Set 32MB memory mode
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@ Set 32MB memory mode
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ldr r0, AdrMemCtrl
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ldr r0, AdrMemCtrl
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mov r1, #1
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mov r1, #1
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str r1, [r0]
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str r1, [r0]
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.extern main
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.extern main
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bl main
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bl main
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@ jump to program at r0
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@ jump to program at r0
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.globl _jump_to_program
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.globl _jump_to_program
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_jump_to_program:
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_jump_to_program:
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@ ----------------------------------------------
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@ ----------------------------------------------
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@ Copy ATAG structure to AdrBootParams
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@ Copy ATAG structure to AdrBootParams
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@ ----------------------------------------------
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@ ----------------------------------------------
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ldr r1, AdrBootParams
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ldr r1, AdrBootParams
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ldr r2, AdrATAGBase
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ldr r2, AdrATAGBase
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ldr r3, AdeEndATAG
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ldr r3, AdeEndATAG
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1: cmp r2, r3
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1: cmp r2, r3
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beq 2f
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beq 2f
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ldr r4, [r2], #4
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ldr r4, [r2], #4
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str r4, [r1], #4
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str r4, [r1], #4
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b 1b
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b 1b
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@ Set memc page tables
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@ Set memc page tables
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2: ldr r2, AdrPageTabes
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2: ldr r2, AdrPageTabes
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mov r3, #0
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mov r3, #0
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mov r4, #40
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mov r4, #40
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3: str r3,[r2],#4
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3: str r3,[r2],#4
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subs r4, r4, #1
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subs r4, r4, #1
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bne 3b
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bne 3b
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@ ----------------------------------------------
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@ ----------------------------------------------
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@ jump to start of program in svc mode with interrupts disabled
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@ jump to start of program in svc mode with interrupts disabled
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@ ----------------------------------------------
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@ ----------------------------------------------
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mov r4, r0
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mov r4, r0
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orr r4, #0x0c000003
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orr r4, #0x0c000003
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mov r0, #0
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mov r0, #0
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mov pc, r4
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mov pc, r4
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service_irq:
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service_irq:
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@ Save all registers to the stack
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@ As this is an interrupt, need tp save all registers to the stack
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stmfd sp!, {r0-r12, lr}
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stmfd sp!, {r0-r3, lr}
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@ is it a timer interrupt ?
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@ is it a timer interrupt ?
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ldr r0, AdrInterruptStatus
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ldr r0, AdrInterruptStatus
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ldr r1, [r0]
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ldr r3, [r0]
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ands r2, r1, #0x20
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ands r2, r3, #0x20
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beq 1f @ not timer int, jump
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beq 1f @ not timer int, jump
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@ Remember that registers r0 to r2 can be changed by this function
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.extern timer_interrupt
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.extern timer_interrupt
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bl timer_interrupt
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bl timer_interrupt
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@ is it an ethernet interrupt ?
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@ is it an ethernet interrupt ?
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1: ands r2, r1, #0x100
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1: ands r2, r3, #0x100
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beq 2f @ not ethmac int, jump
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beq 2f @ not ethmac int, jump
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.extern ethmac_interrupt
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.extern ethmac_interrupt
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@ Remember that registers r0 to r2 can be changed by this function
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bl ethmac_interrupt
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bl ethmac_interrupt
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2: @ Restore all registers from the stack
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2: @ Restore all registers from the stack
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ldmfd sp!, {r0-r12, lr}
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ldmfd sp!, {r0-r3, lr}
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@ Jump straight back to normal execution
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@ Jump straight back to normal execution
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subs pc, lr, #4
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subs pc, lr, #4
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/* _testfail: Used to terminate execution in Verilog simulations */
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/* _testfail: Used to terminate execution in Verilog simulations */
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/* On the board just puts the processor into an infinite loop */
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/* On the board just puts the processor into an infinite loop */
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.globl _testfail
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.globl _testfail
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_testfail:
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_testfail:
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ldr r11, AdrTestStatus
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ldr r11, AdrTestStatus
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str r0, [r11]
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str r0, [r11]
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b _testfail
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b _testfail
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/* _testpass: Used to terminate execution in Verilog simulations */
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/* _testpass: Used to terminate execution in Verilog simulations */
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/* On the board just puts the processor into an infinite loop */
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/* On the board just puts the processor into an infinite loop */
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.globl _testpass
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.globl _testpass
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_testpass:
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_testpass:
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ldr r11, AdrTestStatus
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ldr r11, AdrTestStatus
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mov r10, #17
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mov r10, #17
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str r10, [r11]
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str r10, [r11]
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b _testpass
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b _testpass
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/* _div: Integer division function */
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/* _div: Integer division function */
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@ Divide r0 by r1
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@ Divide r0 by r1
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@ Answer returned in r1
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@ Answer returned in r1
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.globl _div
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.globl _div
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.globl __aeabi_idiv
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.globl __aeabi_idiv
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__aeabi_idiv:
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__aeabi_idiv:
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_div:
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_div:
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stmdb sp!, {r4, lr}
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stmdb sp!, {r4, lr}
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@ set r4 to 1 if one of the two inputs is negative
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@ set r4 to 1 if one of the two inputs is negative
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and r2, r0, #0x80000000
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and r2, r0, #0x80000000
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and r3, r1, #0x80000000
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and r3, r1, #0x80000000
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eor r4, r2, r3
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eor r4, r2, r3
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@ Invert negative numbers
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@ Invert negative numbers
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tst r0, #0x80000000
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tst r0, #0x80000000
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mvnne r0, r0
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mvnne r0, r0
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addne r0, r0, #1
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addne r0, r0, #1
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tst r1, #0x80000000
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tst r1, #0x80000000
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mvnne r1, r1
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mvnne r1, r1
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addne r1, r1, #1
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addne r1, r1, #1
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@ divide r1 by r2, also use registers r0 and r4
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@ divide r1 by r2, also use registers r0 and r4
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mov r2, r1
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mov r2, r1
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mov r1, r0
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mov r1, r0
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|
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cmp r2, #0
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cmp r2, #0
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beq 3f
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beq 3f
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@ In order to divide r1 by r2, the first thing we need to do is to shift r2
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@ In order to divide r1 by r2, the first thing we need to do is to shift r2
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@ left by the necessary number of places. The easiest method of doing this
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@ left by the necessary number of places. The easiest method of doing this
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@ is simply by trial and error - shift until we discover that r2 has become
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@ is simply by trial and error - shift until we discover that r2 has become
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@ too big, then stop.
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@ too big, then stop.
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mov r0,#0 @ clear r0 to accumulate result
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mov r0,#0 @ clear r0 to accumulate result
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mov r3,#1 @ set bit 0 in r3, which will be
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mov r3,#1 @ set bit 0 in r3, which will be
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@ shifted left then right
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@ shifted left then right
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1: cmp r3, #0 @ escape on error
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1: cmp r3, #0 @ escape on error
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moveq r3, #0x10000000
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moveq r3, #0x10000000
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beq 2f
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beq 2f
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cmp r2,r1
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cmp r2,r1
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movls r2,r2,lsl#1
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movls r2,r2,lsl#1
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movls r3,r3,lsl#1
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movls r3,r3,lsl#1
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bls 1b
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bls 1b
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@ shift r2 left until it is about to be bigger than r1
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@ shift r2 left until it is about to be bigger than r1
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@ shift r3 left in parallel in order to flag how far we have to go
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@ shift r3 left in parallel in order to flag how far we have to go
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|
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@ r0 will be used to hold the result. The role of r3 is more complicated.
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@ r0 will be used to hold the result. The role of r3 is more complicated.
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@ In effect, we are using r3 to mark where the right-hand end of r2 has got to
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@ In effect, we are using r3 to mark where the right-hand end of r2 has got to
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@ - if we shift r2 three places left, this will be indicated by a value of %1000
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@ - if we shift r2 three places left, this will be indicated by a value of %1000
|
@ in r3. However, we also add it to r0 every time we manage a successful subtraction,
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@ in r3. However, we also add it to r0 every time we manage a successful subtraction,
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@ since it marks the position of the digit currently being calculated in the answer.
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@ since it marks the position of the digit currently being calculated in the answer.
|
@ In the binary example (50 ÷ 10) above, we shifted the '10' two places left,
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@ In the binary example (50 ÷ 10) above, we shifted the '10' two places left,
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@ so at the time of the first subtraction, r3 would have been %100, at the time
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@ so at the time of the first subtraction, r3 would have been %100, at the time
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@ of the second (which failed) it would have been %10, and at the time of the
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@ of the second (which failed) it would have been %10, and at the time of the
|
@ third %1. Adding it to r0 after each successful subtraction would have
|
@ third %1. Adding it to r0 after each successful subtraction would have
|
@ given us, once again, the answer of %101!
|
@ given us, once again, the answer of %101!
|
|
|
@ Now for the loop that actually does the work:
|
@ Now for the loop that actually does the work:
|
2: cmp r1,r2 @ carry set if r1>r2 (don't ask why)
|
2: cmp r1,r2 @ carry set if r1>r2 (don't ask why)
|
subcs r1,r1,r2 @ subtract r2 from r1 if this would
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subcs r1,r1,r2 @ subtract r2 from r1 if this would
|
@ give a positive answer
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@ give a positive answer
|
addcs r0,r0,r3 @ and add the current bit in r3 to
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addcs r0,r0,r3 @ and add the current bit in r3 to
|
@ the accumulating answer in r0
|
@ the accumulating answer in r0
|
|
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@ In subtraction (a cmp instruction simulates a subtraction in
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@ In subtraction (a cmp instruction simulates a subtraction in
|
@ order to set the flags), if r1 - r2 gives a positive answer and no 'borrow'
|
@ order to set the flags), if r1 - r2 gives a positive answer and no 'borrow'
|
@ is required, the carry flag is set. This is required in order to make SBC
|
@ is required, the carry flag is set. This is required in order to make SBC
|
@ (Subtract with Carry) work properly when used to carry out a 64-bit subtraction,
|
@ (Subtract with Carry) work properly when used to carry out a 64-bit subtraction,
|
@ but it is confusing!
|
@ but it is confusing!
|
|
|
@ In this case, we are turning it to our advantage. The carry flag is set to
|
@ In this case, we are turning it to our advantage. The carry flag is set to
|
@ indicate that a successful subtraction is possible, i.e. one that doesn't
|
@ indicate that a successful subtraction is possible, i.e. one that doesn't
|
@ generate a negative result, and the two following instructions are carried
|
@ generate a negative result, and the two following instructions are carried
|
@ out only when the condition Carry Set applies. Note that the 'S' on the end
|
@ out only when the condition Carry Set applies. Note that the 'S' on the end
|
@ of these instructions is part of the 'CS' condition code and does not mean
|
@ of these instructions is part of the 'CS' condition code and does not mean
|
@ that they set the flags!
|
@ that they set the flags!
|
|
|
movs r3,r3,lsr #1 @ Shift r3 right into carry flag
|
movs r3,r3,lsr #1 @ Shift r3 right into carry flag
|
movcc r2,r2,lsr #1 @ and if bit 0 of r3 was zero, also
|
movcc r2,r2,lsr #1 @ and if bit 0 of r3 was zero, also
|
@ shift r2 right
|
@ shift r2 right
|
bcc 2b @ If carry not clear, r3 has shifted
|
bcc 2b @ If carry not clear, r3 has shifted
|
@ back to where it started, and we
|
@ back to where it started, and we
|
@ can end
|
@ can end
|
|
|
@ if one of the inputs is negetive then return a negative result
|
@ if one of the inputs is negetive then return a negative result
|
tst r4, #0x80000000
|
tst r4, #0x80000000
|
mvnne r0, r0
|
mvnne r0, r0
|
addne r0, r0, #1
|
addne r0, r0, #1
|
3: ldmia sp!, {r4, pc}^
|
3: ldmia sp!, {r4, pc}^
|
|
|
|
|
/* strcpy: String copy function
|
/* strcpy: String copy function
|
char * strcpy ( char * destination, const char * source );
|
char * strcpy ( char * destination, const char * source );
|
destination is returned
|
destination is returned
|
*/
|
*/
|
@ r0 points to destination
|
@ r0 points to destination
|
@ r1 points to source string which terminates with a 0
|
@ r1 points to source string which terminates with a 0
|
.globl strcpy
|
.globl strcpy
|
strcpy:
|
strcpy:
|
stmdb sp!, {r4-r6, lr}
|
stmdb sp!, {r4-r6, lr}
|
@ Use r6 to process the destination pointer.
|
@ Use r6 to process the destination pointer.
|
@ At the end of the function, r0 is returned, so need to preserve it
|
@ At the end of the function, r0 is returned, so need to preserve it
|
mov r6, r0
|
mov r6, r0
|
|
|
strcpy_main:
|
strcpy_main:
|
@ unroll the loop 4 times
|
@ unroll the loop 4 times
|
ldrb r3, [r1], #1
|
ldrb r3, [r1], #1
|
strb r3, [r6], #1
|
strb r3, [r6], #1
|
cmp r3, #0
|
cmp r3, #0
|
ldmeqia sp!, {r4-r6, pc}^
|
ldmeqia sp!, {r4-r6, pc}^
|
|
|
ldrb r3, [r1], #1
|
ldrb r3, [r1], #1
|
strb r3, [r6], #1
|
strb r3, [r6], #1
|
cmp r3, #0
|
cmp r3, #0
|
ldmeqia sp!, {r4-r6, pc}^
|
ldmeqia sp!, {r4-r6, pc}^
|
|
|
ldrb r3, [r1], #1
|
ldrb r3, [r1], #1
|
strb r3, [r6], #1
|
strb r3, [r6], #1
|
cmp r3, #0
|
cmp r3, #0
|
ldmeqia sp!, {r4-r6, pc}^
|
ldmeqia sp!, {r4-r6, pc}^
|
|
|
ldrb r3, [r1], #1
|
ldrb r3, [r1], #1
|
strb r3, [r6], #1
|
strb r3, [r6], #1
|
cmp r3, #0
|
cmp r3, #0
|
ldmeqia sp!, {r4-r6, pc}^
|
ldmeqia sp!, {r4-r6, pc}^
|
|
|
b strcpy_main
|
b strcpy_main
|
|
|
|
|
|
|
/* strncpy: String copy function */
|
/* strncpy: String copy function */
|
@ r0 points to destination
|
@ r0 points to destination
|
@ r1 points to source string
|
@ r1 points to source string
|
@ r2 is the number of bytes to copy
|
@ r2 is the number of bytes to copy
|
.globl strncpy
|
.globl strncpy
|
strncpy:
|
strncpy:
|
stmdb sp!, {r4, lr}
|
stmdb sp!, {r4, lr}
|
cmp r2, #0
|
cmp r2, #0
|
beq 2f
|
beq 2f
|
add r4, r0, r2 @ set r4 to the address of the last byte copied
|
add r4, r0, r2 @ set r4 to the address of the last byte copied
|
1: ldrb r3, [r1], #1
|
1: ldrb r3, [r1], #1
|
strb r3, [r0], #1
|
strb r3, [r0], #1
|
cmp r0, r4
|
cmp r0, r4
|
bne 1b
|
bne 1b
|
2: ldmia sp!, {r4, pc}^
|
2: ldmia sp!, {r4, pc}^
|
|
|
|
|
|
|
/* strncpy: String compare function */
|
/* strncpy: String compare function */
|
@ r0 points to first string
|
@ r0 points to first string
|
@ r1 points to second string
|
@ r1 points to second string
|
@ r2 is the number of bytes to compare
|
@ r2 is the number of bytes to compare
|
@ return the difference if the strings don't match
|
@ return the difference if the strings don't match
|
.globl strncmp
|
.globl strncmp
|
strncmp:
|
strncmp:
|
stmdb sp!, {r4, r5, r6, lr}
|
stmdb sp!, {r4, r5, r6, lr}
|
|
|
@ check for 0 length
|
@ check for 0 length
|
cmp r2, #0
|
cmp r2, #0
|
moveq r0, #1
|
moveq r0, #1
|
beq 2f
|
beq 2f
|
|
|
mov r3, #0
|
mov r3, #0
|
|
|
1: add r3, r3, #1
|
1: add r3, r3, #1
|
ldrb r4, [r0], #1
|
ldrb r4, [r0], #1
|
ldrb r5, [r1], #1
|
ldrb r5, [r1], #1
|
|
|
subs r6, r4, r5
|
subs r6, r4, r5
|
movne r0, r6
|
movne r0, r6
|
bne 2f
|
bne 2f
|
|
|
cmp r3, r2
|
cmp r3, r2
|
moveq r0, #0
|
moveq r0, #0
|
beq 2f
|
beq 2f
|
|
|
b 1b
|
b 1b
|
2: ldmia sp!, {r4, r5, r6, pc}^
|
2: ldmia sp!, {r4, r5, r6, pc}^
|
|
|
|
|
|
|
.globl init_malloc
|
.globl init_malloc
|
init_malloc:
|
init_malloc:
|
ldr r0, AdrMallocBase
|
ldr r0, AdrMallocBase
|
ldr r1, AdrMallocPointer
|
ldr r1, AdrMallocPointer
|
str r0, [r1]
|
str r0, [r1]
|
|
|
@ initialize the counter to 0
|
@ initialize the counter to 0
|
ldr r1, AdrMallocCount
|
ldr r1, AdrMallocCount
|
mov r2, #0
|
mov r2, #0
|
str r2, [r1]
|
str r2, [r1]
|
|
|
mov pc, lr
|
mov pc, lr
|
|
|
|
|
/* void *malloc(size_t size); */
|
/* void *malloc(size_t size); */
|
.globl malloc
|
.globl malloc
|
malloc:
|
malloc:
|
/* r0 contains the size of the object in bytes */
|
/* r0 contains the size of the object in bytes */
|
ldr r1, AdrMallocPointer
|
ldr r1, AdrMallocPointer
|
ldr r2, [r1] /* r2 now containts the starting address of the next memory block to use */
|
ldr r2, [r1] /* r2 now containts the starting address of the next memory block to use */
|
add r3, r0, r2 /* r3 contains the address after the end of the new object */
|
add r3, r0, r2 /* r3 contains the address after the end of the new object */
|
|
|
/* Round r3 up to the nearest 0x100 to keep memory aligned */
|
/* Round r3 up to the nearest 0x100 to keep memory aligned */
|
tst r3, #0xff
|
tst r3, #0xff
|
beq 1f
|
beq 1f
|
bic r3, r3, #0xff
|
bic r3, r3, #0xff
|
add r3, r3, #0x100
|
add r3, r3, #0x100
|
|
|
1: str r3, [r1] /* Update the malloc pointer */
|
1: str r3, [r1] /* Update the malloc pointer */
|
mov r0, r2 /* Return the address from before the pointer was updated */
|
mov r0, r2 /* Return the address from before the pointer was updated */
|
|
|
@ Update the block count
|
@ Update the block count
|
ldr r1, AdrMallocCount
|
ldr r1, AdrMallocCount
|
ldr r2, [r1]
|
ldr r2, [r1]
|
add r2, r2, #1
|
add r2, r2, #1
|
str r2, [r1]
|
str r2, [r1]
|
|
|
mov pc, lr
|
mov pc, lr
|
|
|
|
|
|
.global serial_putchar_
|
|
serial_putchar_:
|
|
ldr r1, AdrUARTDR
|
|
ldr r3, AdrUARTFR
|
|
@ Check the tx_full flag
|
|
1: ldr r2, [r3]
|
|
and r2, r2, #0x20
|
|
cmp r2, #0
|
|
streqb r0, [r1]
|
|
moveqs pc, lr @ return
|
|
bne 1b
|
|
|
|
|
/* stack at top of ddr3 memory space */
|
/* stack at top of ddr3 memory space */
|
AdrJumpPoint: .word _jump_point
|
AdrJumpPoint: .word _jump_point
|
AdrExecBase: .word ADR_EXEC_BASE
|
AdrExecBase: .word ADR_EXEC_BASE
|
AdrStack: .word ADR_STACK
|
AdrStack: .word ADR_STACK
|
AdrIRQStack: .word ADR_IRQ_STACK
|
AdrIRQStack: .word ADR_IRQ_STACK
|
AdrMallocPointer: .word ADR_MALLOC_POINTER
|
AdrMallocPointer: .word ADR_MALLOC_POINTER
|
AdrMallocCount: .word ADR_MALLOC_COUNT
|
AdrMallocCount: .word ADR_MALLOC_COUNT
|
AdrMallocBase: .word ADR_MALLOC_BASE
|
AdrMallocBase: .word ADR_MALLOC_BASE
|
|
|
AdrMemCtrl: .word ADR_AMBER_TEST_MEM_CTRL
|
AdrMemCtrl: .word ADR_AMBER_TEST_MEM_CTRL
|
AdrTestStatus: .word ADR_AMBER_TEST_STATUS
|
AdrTestStatus: .word ADR_AMBER_TEST_STATUS
|
AdrInterruptStatus: .word ADR_AMBER_IC_IRQ0_STATUS
|
AdrInterruptStatus: .word ADR_AMBER_IC_IRQ0_STATUS
|
|
|
|
AdrUARTDR: .word ADR_AMBER_UART0_DR
|
|
AdrUARTFR: .word ADR_AMBER_UART0_FR
|
|
|
.align 2
|
.align 2
|
AdrATAGBase: .word ATAGBase
|
AdrATAGBase: .word ATAGBase
|
AdeEndATAG: .word EndATAG
|
AdeEndATAG: .word EndATAG
|
|
|
ATAGBase: .word ATAG_CORE_SIZE
|
ATAGBase: .word ATAG_CORE_SIZE
|
.word ATAG_CORE
|
.word ATAG_CORE
|
.word FLAG_READONLY @ flags
|
.word FLAG_READONLY @ flags
|
.word 4096 @ page size
|
.word 4096 @ page size
|
.word 0x0 @ rootdev
|
.word 0x0 @ rootdev
|
|
|
.word ATAG_MEM_SIZE
|
.word ATAG_MEM_SIZE
|
.word ATAG_MEM
|
.word ATAG_MEM
|
.word 32*1024*1024 @ size - 32MB
|
.word 32*1024*1024 @ size - 32MB
|
.word 0x0 @ start
|
.word 0x0 @ start
|
|
|
.word ATAG_RAMDISK_SIZE
|
.word ATAG_RAMDISK_SIZE
|
.word ATAG_RAMDISK
|
.word ATAG_RAMDISK
|
.word 1 @ flags: bit 0 = load, bit 1 = prompt
|
.word 1 @ flags: bit 0 = load, bit 1 = prompt
|
.word 0x000000d0 @ size in 1k blocks
|
.word 0x000000d0 @ size in 1k blocks
|
.word 0x00800000 @ physical address of start of ramdisk
|
.word 0x00800000 @ physical address of start of ramdisk
|
|
|
.word ATAG_INITRD_SIZE
|
.word ATAG_INITRD_SIZE
|
.word ATAG_INITRD
|
.word ATAG_INITRD
|
.word 0x02800000 @ virtual address of start of initrd image
|
.word 0x02800000 @ virtual address of start of initrd image
|
.word 0x00032000 @ size = 200k
|
.word 0x00032000 @ size = 200k
|
|
|
.word ATAG_NONE
|
.word ATAG_NONE
|
.word 0x0
|
.word 0x0
|
EndATAG: .word 0x0
|
EndATAG: .word 0x0
|
|
|
AdrBootParams: .word 0x7c000
|
AdrBootParams: .word 0x7c000
|
AdrPageTabes: .word 0x3f01000
|
AdrPageTabes: .word 0x3f01000
|
|
|
