URL https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk

Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [src_processor/] [or1200/] [sw/] [Makefile] - Diff between revs 38 and 45

Rev 38	Rev 45
Line 21...	Line 21...
`MARCH_FLAGS ?=-msoft-mul -msoft-div -msoft-float`	`MARCH_FLAGS ?=-msoft-mul -msoft-div -msoft-float`
`CFLAGS ?= -g -nostdlib -O2 $(MARCH_FLAGS)`	`CFLAGS ?= -g -nostdlib -O2 $(MARCH_FLAGS)`

`LDFLAGS ?= -Tlink.ld -e 256`	`LDFLAGS ?= -Tlink.ld -e 256`

`RAMSIZE=3FFF`	`#RAMSIZE=3FFF`

`# Sources to go into the liborpsoc.a support library`	`# Sources to go into the liborpsoc.a support library`
`COMPILE_SRCS=$(HDR_SOURCE_DIR)/exceptions.c $(HDR_SOURCE_DIR)/int.c $(HDR_SOURCE_DIR)/mmu.S $(HDR_SOURCE_DIR)/$(HDR_SOURCE_DIR)-utils.c $(HDR_SOURCE_DIR)/cache.S`	`COMPILE_SRCS=$(HDR_SOURCE_DIR)/exceptions.c $(HDR_SOURCE_DIR)/int.c $(HDR_SOURCE_DIR)/mmu.S $(HDR_SOURCE_DIR)/$(HDR_SOURCE_DIR)-utils.c $(HDR_SOURCE_DIR)/cache.S`


Line 55...	Line 55...
`image.ihex: image image.lst`	`image.ihex: image image.lst`
`# Convert the ELF file to an IHEX file`	`# Convert the ELF file to an IHEX file`
`mkdir -p ./RAM`	`mkdir -p ./RAM`
`$(OR32_OBJCOPY) -O ihex image image.ihex`	`$(OR32_OBJCOPY) -O ihex image image.ihex`
`# Generate a MIF & BIN files from the IHEX file`	`# Generate a MIF & BIN files from the IHEX file`
`$(IHEX2MIF) -f image.ihex -e $(RAMSIZE) -o RAM/ram0.mif`	`# $(IHEX2MIF) -f image.ihex -e $(RAMSIZE) -o RAM/ram0.mif`
	`$(IHEX2MIF) -f image.ihex -o RAM/ram0.mif`
`$(IHEX2BIN) -i image.ihex -o RAM/ram0.bin`	`$(IHEX2BIN) -i image.ihex -o RAM/ram0.bin`
`$(BIN2HEX) -f RAM/ram0.bin -h`	`$(BIN2HEX) -f RAM/ram0.bin -h`
`rm *.o`	`rm *.o`