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[/] [artificial_neural_network/] [trunk/] [ANN_kernel/] [RTL_VHDL_files/] [af_sigmoid2.vhd] - Diff between revs 3 and 8

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entity af_sigmoid2 is
entity af_sigmoid2 is
   generic
   generic
   (
   (
      Nbit : natural := 8
      Nbit : natural := 8;
 
      lsbit : natural := 10
   );
   );
   port
   port
   (
   (
      reset   : in  std_logic;
      reset   : in  std_logic;
      clk     : in  std_logic;
      clk     : in  std_logic;
Line 45... Line 46...
architecture Behavioral of af_sigmoid2 is
architecture Behavioral of af_sigmoid2 is
 
 
   -- Definition of internal modules, constants, signals, etc...
   -- Definition of internal modules, constants, signals, etc...
 
 
   -- Sigmoid parameters:
   -- Sigmoid parameters:
   constant f0 : real := 0.5; -- Slope at the origin
   constant f0 : real := 1.0; -- Slope at the origin
   constant fr : real := 2.0; -- fr = fmax - fmin
   constant fr : real := 2.0; -- fr = fmax - fmin
 
 
   signal dataIn: integer range (2**Nbit-1) downto 0; -- To convert std_logic_vector input to integer index for the LUT
   signal dataIn: integer range (2**Nbit-1) downto 0; -- To convert std_logic_vector input to integer index for the LUT
   type table_t is array(0 to (2**Nbit)-1) of std_logic_vector(Nbit-1 downto 0); -- LUT type
   type table_t is array(0 to (2**Nbit)-1) of std_logic_vector(Nbit-1 downto 0); -- LUT type
 
 
-- Function Sigmoidal: generates the Look-Up-Table for the sigmoid activation function:
-- Function Sigmoidal: generates the Look-Up-Table for the sigmoid activation function:
-- margin: maximun value of x.
-- margin: maximum value of input
   function Sigmoidal(margin:real;Nbit:natural) return table_t is
   function Sigmoidal(margin:real;Nbit:natural;lsbit:natural) return table_t is
         variable scale,x,y,w,t: real;
         variable scale,x,y,w,t: real;
         variable u: integer;
         variable u: integer;
         variable fbits: std_logic_vector(Nbit-1 downto 0);
         variable fbits: std_logic_vector(Nbit-1 downto 0);
         variable table: table_t;
         variable table: table_t;
      begin
      begin
         scale := (2.0*margin)/(2.0**Nbit);   -- Calculates gap between to points
         scale := (2.0*margin)/(2.0**Nbit);   -- Calculates gap between to points
         x := -margin;
         x := -margin;
         for idx in -(2**(Nbit-1)) to (2**(Nbit-1))-1 loop
         for idx in -(2**(Nbit-1)) to (2**(Nbit-1))-1 loop
            y := ( fr / (1.0+exp(((-4.0*f0)/fr)*x)) ) - (fr/2.0);
            y := ( fr / (1.0+exp(((-4.0*f0)/fr)*x)) ) - (fr/2.0);
            w := y*(2.0**(Nbit-1));           -- Shifts bits to the left
            w := y*(2.0**(lsbit));           -- Shifts bits to the left
            t := round(w);
            t := round(w);
            u := integer(t);
            u := integer(t);
            fbits := std_logic_vector(to_signed(u,Nbit));
            fbits := std_logic_vector(to_signed(u,Nbit));
            table(to_integer(to_unsigned(idx+(2**Nbit),Nbit))):= fbits;
            table(to_integer(to_unsigned(idx+(2**Nbit),Nbit))):= fbits;
            x := x+scale;
            x := x+scale;
         end loop;
         end loop;
         return table;
         return table;
   end Sigmoidal;
   end Sigmoidal;
   signal Table: table_t := Sigmoidal(1.0,Nbit); -- Generation of the LUT (at synthesis time)
   signal Table: table_t := Sigmoidal(2.0**(Nbit-lsbit-1),Nbit,lsbit); -- Generation of the LUT (at synthesis time)
 
 
begin
begin
 
 
   -- Description of the activation function
   -- Description of the activation function
   dataIn <= to_integer(signed(inputs));
   dataIn <= to_integer(unsigned(inputs));
 
 
   Activacion: process(clk,reset)
   Activacion: process(clk,reset)
      begin
      begin
         if clk'event and clk = '1' then
         if clk'event and clk = '1' then
            if reset = '1' then
            if reset = '1' then

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