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Line 16... |
-- See the License for the specific language governing permissions and
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-- See the License for the specific language governing permissions and
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-- limitations under the License.
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-- limitations under the License.
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--
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--
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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|
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LIBRARY ieee, technology_lib;
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LIBRARY ieee;
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USE ieee.std_logic_1164.all;
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USE ieee.std_logic_1164.all;
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USE work.tech_memory_component_pkg.ALL;
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USE work.tech_memory_component_pkg.ALL;
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USE technology_lib.technology_pkg.ALL;
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--USE technology_lib.technology_pkg.ALL;
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USE technology_lib.technology_select_pkg.ALL;
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--USE technology_lib.technology_select_pkg.ALL;
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-- Declare IP libraries to ensure default binding in simulation. The IP library clause is ignored by synthesis.
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-- Declare IP libraries to ensure default binding in simulation. The IP library clause is ignored by synthesis.
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LIBRARY ip_stratixiv_ram_lib;
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--LIBRARY ip_stratixiv_ram_lib;
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--LIBRARY ip_arria10_ram_lib;
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--LIBRARY ip_arria10_ram_lib;
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--LIBRARY ip_arria10_e3sge3_ram_lib;
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--LIBRARY ip_arria10_e3sge3_ram_lib;
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--LIBRARY ip_arria10_e1sg_ram_lib;
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--LIBRARY ip_arria10_e1sg_ram_lib;
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ENTITY tech_memory_ram_cr_cw IS
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ENTITY tech_memory_ram_cr_cw IS
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GENERIC (
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GENERIC (
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g_technology : NATURAL := c_tech_select_default;
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g_technology : NATURAL := 0; --c_tech_select_default;
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g_adr_w : NATURAL := 5;
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g_adr_w : NATURAL := 5;
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g_dat_w : NATURAL := 8;
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g_dat_w : NATURAL := 8;
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g_nof_words : NATURAL := 2**5;
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g_nof_words : NATURAL := 2**5;
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g_rd_latency : NATURAL := 2; -- choose 1 or 2
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g_rd_latency : NATURAL := 2; -- choose 1 or 2
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g_init_file : STRING := "UNUSED"
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g_init_file : STRING := "UNUSED"
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Line 54... |
END tech_memory_ram_cr_cw;
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END tech_memory_ram_cr_cw;
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ARCHITECTURE str OF tech_memory_ram_cr_cw IS
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ARCHITECTURE str OF tech_memory_ram_cr_cw IS
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BEGIN
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BEGIN
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gen_ip_stratixiv : IF g_technology=c_tech_stratixiv GENERATE
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gen_ip_stratixiv : IF g_technology=0 GENERATE
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u0 : ip_stratixiv_ram_cr_cw
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u0 : ip_stratixiv_ram_cr_cw
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GENERIC MAP (g_adr_w, g_dat_w, g_nof_words, g_rd_latency, g_init_file)
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GENERIC MAP (g_adr_w, g_dat_w, g_nof_words, g_rd_latency, g_init_file)
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PORT MAP (data, rdaddress, rdclock, rdclocken, wraddress, wrclock, wrclocken, wren, q);
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PORT MAP (data, rdaddress, rdclock, rdclocken, wraddress, wrclock, wrclocken, wren, q);
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END GENERATE;
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END GENERATE;
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