URL https://opencores.org/ocsvn/avs_aes/avs_aes/trunk

Subversion Repositories avs_aes

[/] [avs_aes/] [trunk/] [doc/] [manual/] [src/] [glossary.tex] - Diff between revs 11 and 18

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`\glossary{name={Byte},`	`\newacronym{LSB}{LSB}{Least Significant Bit}`
`description={String of Bits - nowadays mostly a string of 8 Bits, also called oktett},`	`\newacronym{MSB}{MSB}{Most Significant Bit}`
`sort={Byte}`	`\newacronym{SoC}{SoC}{System on Chip}`
`}`	`\newacronym{AES}{AES}{Advanced Encryption Standard}`
`\glossary{name={Bit},`	`\newacronym{ECB}{ECB}{Electronic Code Book}`
`description={Binary Digit, atomary information unit},`	`\newacronym{FSM}{FSM}{Finite State Machine}`
`sort={Bit}`	`\newacronym{NIST}{NIST}{National Institute of Standards and Technology}`
`}`
`\glossary{name={switch fabric},`
`description={Interconnect between IP-Cores providing arbiration and glue logic. Altera\rtm\ Avalon\rtm\ term},`
`sort={Switch fabric}`
`}`

`\glossary{name={Master},`
`description={Entity initiating and controlling communication.},`
`sort={Master}`
`}`

`\glossary{name={Slave},`
`description={Entity responding to communication requests by a Master.},`
`sort={Slave}`
`}`

`\glossary{name={memory mapped},`
`description={Method of addressing peripheral components like Avalon Slaves via the same address bus as main memory},`
`sort={memory mapped}`
`}`


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