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URL https://opencores.org/ocsvn/avs_aes/avs_aes/trunk

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[/] [avs_aes/] [trunk/] [sim/] [Makefile] - Diff between revs 2 and 11

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Rev 2 Rev 11
Line 1... Line 1...
VCOM    = /usr/local/bin/vcom
VCOM    = /usr/local/bin/vcom
VCOMOPS = -explicit -check_synthesis -2002 -quiet
VCOMOPS = -explicit -check_synthesis -2002 -quiet
#MAKEFLAGS = --silent
#MAKEFLAGS = --silent
HDL_DIR = ../hdl/
HDL_DIR = ../rtl/VHDL/
 
 
 
 
##
##
# aes_ecb files
# avs_aes hdl files
##
##
AES_ECB_SRC_DIR = $(HDL_DIR)aes_ecb/
AVS_AES_SRC =$(HDL_DIR)avs_aes_pkg.vhd \
AES_ECB_SRC =$(AES_ECB_SRC_DIR)aes_ecb_pkg.vhd \
                 $(HDL_DIR)mux2.vhd \
                 $(AES_ECB_SRC_DIR)mux2.vhd \
                 $(HDL_DIR)mux3.vhd \
                 $(AES_ECB_SRC_DIR)mux3.vhd \
                 $(HDL_DIR)memory_word.vhd \
                 $(AES_ECB_SRC_DIR)memory_word.vhd \
                 $(HDL_DIR)addroundkey.vhd \
                 $(AES_ECB_SRC_DIR)addroundkey.vhd \
                 $(HDL_DIR)aes_fsm_encrypt.vhd \
                 $(AES_ECB_SRC_DIR)aes_fsm_encrypt.vhd \
                 $(HDL_DIR)aes_fsm_decrypt.vhd \
                 $(AES_ECB_SRC_DIR)aes_fsm_decrypt.vhd \
                 $(HDL_DIR)keyexpansionV2.vhd \
                 $(AES_ECB_SRC_DIR)keyexpansionV2.vhd \
                 $(HDL_DIR)mixcol.vhd \
                 $(AES_ECB_SRC_DIR)mixcol.vhd \
                 $(HDL_DIR)mixcol_fwd.vhd \
                 $(AES_ECB_SRC_DIR)mixcol_fwd.vhd \
                 $(HDL_DIR)mixcol_inv.vhd \
                 $(AES_ECB_SRC_DIR)mixcol_inv.vhd \
                 $(HDL_DIR)sbox.vhd \
                 $(AES_ECB_SRC_DIR)sbox.vhd \
                 $(HDL_DIR)sboxM4k.vhd \
                 $(AES_ECB_SRC_DIR)sboxM4k.vhd \
                 $(HDL_DIR)shiftrow.vhd \
                 $(AES_ECB_SRC_DIR)shiftrow.vhd \
                 $(HDL_DIR)shiftrow_fwd.vhd \
                 $(AES_ECB_SRC_DIR)shiftrow_fwd.vhd \
                 $(HDL_DIR)shiftrow_inv.vhd \
                 $(AES_ECB_SRC_DIR)shiftrow_inv.vhd \
                 $(HDL_DIR)aes_core.vhd \
                 $(AES_ECB_SRC_DIR)aes_core.vhd \
                 $(HDL_DIR)avs_aes.vhd \
                 $(AES_ECB_SRC_DIR)avs_aes.vhd \
 
                 $(AES_ECB_SRC_DIR)avs_aes_tb.vhd
##
 
# Testbench HDL file
 
##
 
TB_SRC_DIR = ../bench/VHDL/
 
AVS_AES_TB_SRC =  $(TB_SRC_DIR)avs_aes_tb.vhd
 
 
#######################################
#######################################
all: simaes
all: simaes
 
 
clean:
clean:
Line 36... Line 40...
        rm -rf *_lib
        rm -rf *_lib
 
 
.deps:
.deps:
        mkdir .deps > /dev/null 2>&1
        mkdir .deps > /dev/null 2>&1
 
 
aes_ecb_lib:
avs_aes_lib:
        vlib aes_ecb_lib
        vlib avs_aes_lib
 
 
libs: aes_ecb_lib
work:
 
        vlib work
 
 
aes_ecb: .deps aes_ecb_lib .deps/aes_ecb
libs: avs_aes_lib work
.deps/aes_ecb: $(AES_ECB_SRC)
 
 
avs_aes: .deps avs_aes_lib .deps/avs_aes
 
.deps/avs_aes: $(AVS_AES_SRC)
        @echo --
        @echo --
        @echo building AES_ECB
        @echo building AVS_AES
        @echo --
        @echo --
        $(VCOM) $(VCOMOPS) -work aes_ecb_lib  $^
        $(VCOM) $(VCOMOPS) -work avs_aes_lib  $^
        touch .deps/aes_ecb
        touch .deps/avs_aes
 
 
 
avs_aes_tb: .deps .deps/avs_aes .deps/avs_aes_tb avs_aes_lib work
 
.deps/avs_aes_tb: $(AVS_AES_TB_SRC)
 
        @echo --
 
        @echo building AVS_AES Testbench
 
        @echo --
 
        $(VCOM) $(VCOMOPS) -work work  $^
 
        touch .deps/avs_aes_tb
 
 
 
 
 
 
simaes: aes_ecb
simaes: avs_aes avs_aes_tb
        vsim -title "AVS_AES" -do ecb.do -lib aes_ecb_lib avs_aes_tb
        vsim -title "Avalon AES Slave Test" -do avs_aes_tb.do -lib work avs_aes_tb
        vsim -title "Avalon AES Slave Test" -do avs_aes_tb.do -lib work avs_aes_tb
        vsim -title "Avalon AES Slave Test" -do avs_aes_tb.do -lib work avs_aes_tb

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