OpenCores
URL https://opencores.org/ocsvn/axi_slave/axi_slave/trunk

Subversion Repositories axi_slave

[/] [axi_slave/] [trunk/] [src/] [base/] [def_axi_slave_static.txt] - Diff between revs 10 and 12

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 10 Rev 12
Line 27... Line 27...
////                                                             ////
////                                                             ////
//////////////////////////////////////////////////////////////////##>
//////////////////////////////////////////////////////////////////##>
 
 
SWAP.GLOBAL MODEL_NAME AXI slave stub
SWAP.GLOBAL MODEL_NAME AXI slave stub
 
 
VERIFY ((DATA_BITS == 64) || (DATA_BITS == 32)) ##stub supports 32 or 64 bits data bus
VERIFY (DATA_BITS in 32, 64) ##stub supports 32 or 64 bits data bus
VERIFY (SIZE_BITS <= 2) ##stub supports 32 or 64 bits data bus
VERIFY (SIZE_BITS in 2, 3) ##stub supports 32 or 64 bits data bus
VERIFY (ADDR_BITS <= 24) ##Memory size should not be too big to prevent maloc fail
VERIFY (ADDR_BITS <= 24) ##Memory size should not be too big to prevent maloc fail
 
 
GROUP STUB_AXI_A is {
GROUP STUB_AXI_A is {
    ID       ID_BITS                output
    ID       ID_BITS                output
    ADDR     ADDR_BITS              output
    ADDR     ADDR_BITS              output

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.