-------------------------------------------------------------------------------
|
-------------------------------------------------------------------------------
|
--
|
--
|
-- Copyright (C) 2009
|
-- Copyright 2020
|
-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
|
-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
|
-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
|
-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
|
--
|
--
|
-- This program is free software: you can redistribute it and/or modify
|
-- Licensed under the Apache License, Version 2.0 (the "License");
|
-- it under the terms of the GNU General Public License as published by
|
-- you may not use this file except in compliance with the License.
|
-- the Free Software Foundation, either version 3 of the License, or
|
-- You may obtain a copy of the License at
|
-- (at your option) any later version.
|
|
--
|
--
|
-- This program is distributed in the hope that it will be useful,
|
-- http://www.apache.org/licenses/LICENSE-2.0
|
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
-- GNU General Public License for more details.
|
|
--
|
--
|
-- You should have received a copy of the GNU General Public License
|
-- Unless required by applicable law or agreed to in writing, software
|
-- along with this program. If not, see <http://www.gnu.org/licenses/>.
|
-- distributed under the License is distributed on an "AS IS" BASIS,
|
|
-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|
-- See the License for the specific language governing permissions and
|
|
-- limitations under the License.
|
--
|
--
|
-------------------------------------------------------------------------------
|
-------------------------------------------------------------------------------
|
|
|
LIBRARY IEEE, common_pkg_lib;
|
LIBRARY IEEE, common_pkg_lib;
|
USE IEEE.std_logic_1164.ALL;
|
USE IEEE.std_logic_1164.ALL;
|
USE IEEE.numeric_std.ALL;
|
USE IEEE.numeric_std.ALL;
|
USE common_pkg_lib.common_pkg.ALL;
|
USE common_pkg_lib.common_pkg.ALL;
|
|
|
ENTITY common_pipeline_sl IS
|
ENTITY common_pipeline_sl IS
|
GENERIC (
|
GENERIC (
|
g_pipeline : NATURAL := 1; -- 0 for wires, > 0 for registers,
|
g_pipeline : NATURAL := 1; -- 0 for wires, > 0 for registers,
|
g_reset_value : NATURAL := 0; -- 0 or 1, bit reset value,
|
g_reset_value : NATURAL := 0; -- 0 or 1, bit reset value,
|
g_out_invert : BOOLEAN := FALSE
|
g_out_invert : BOOLEAN := FALSE
|
);
|
);
|
PORT (
|
PORT (
|
rst : IN STD_LOGIC := '0';
|
rst : IN STD_LOGIC := '0';
|
clk : IN STD_LOGIC;
|
clk : IN STD_LOGIC;
|
clken : IN STD_LOGIC := '1';
|
clken : IN STD_LOGIC := '1';
|
in_clr : IN STD_LOGIC := '0';
|
in_clr : IN STD_LOGIC := '0';
|
in_en : IN STD_LOGIC := '1';
|
in_en : IN STD_LOGIC := '1';
|
in_dat : IN STD_LOGIC;
|
in_dat : IN STD_LOGIC;
|
out_dat : OUT STD_LOGIC
|
out_dat : OUT STD_LOGIC
|
);
|
);
|
END common_pipeline_sl;
|
END common_pipeline_sl;
|
|
|
|
|
ARCHITECTURE str OF common_pipeline_sl IS
|
ARCHITECTURE str OF common_pipeline_sl IS
|
|
|
SIGNAL in_dat_slv : STD_LOGIC_VECTOR(0 DOWNTO 0);
|
SIGNAL in_dat_slv : STD_LOGIC_VECTOR(0 DOWNTO 0);
|
SIGNAL out_dat_slv : STD_LOGIC_VECTOR(0 DOWNTO 0);
|
SIGNAL out_dat_slv : STD_LOGIC_VECTOR(0 DOWNTO 0);
|
|
|
BEGIN
|
BEGIN
|
|
|
in_dat_slv(0) <= in_dat WHEN g_out_invert=FALSE ELSE NOT in_dat;
|
in_dat_slv(0) <= in_dat WHEN g_out_invert=FALSE ELSE NOT in_dat;
|
out_dat <= out_dat_slv(0);
|
out_dat <= out_dat_slv(0);
|
|
|
u_sl : ENTITY work.common_pipeline
|
u_sl : ENTITY work.common_pipeline
|
GENERIC MAP (
|
GENERIC MAP (
|
g_representation => "UNSIGNED",
|
g_representation => "UNSIGNED",
|
g_pipeline => g_pipeline,
|
g_pipeline => g_pipeline,
|
g_reset_value => sel_a_b(g_out_invert, 1-g_reset_value, g_reset_value),
|
g_reset_value => sel_a_b(g_out_invert, 1-g_reset_value, g_reset_value),
|
g_in_dat_w => 1,
|
g_in_dat_w => 1,
|
g_out_dat_w => 1
|
g_out_dat_w => 1
|
)
|
)
|
PORT MAP (
|
PORT MAP (
|
rst => rst,
|
rst => rst,
|
clk => clk,
|
clk => clk,
|
clken => clken,
|
clken => clken,
|
in_clr => in_clr,
|
in_clr => in_clr,
|
in_en => in_en,
|
in_en => in_en,
|
in_dat => in_dat_slv,
|
in_dat => in_dat_slv,
|
out_dat => out_dat_slv
|
out_dat => out_dat_slv
|
);
|
);
|
|
|
END str;
|
END str;
|
|
|
